Enables code generation for the selected ARM processor or architecture.
Where name is the name of a processor or architecture:
nameis the name of a processor, enter it as shown on ARM data sheets, for example,
nameis the name of an architecture, it must belong to the list of architectures shown in the following table.
Processor and architecture names are not case-sensitive.
Wildcard characters are not accepted.
Table 12-1 Supported ARM architectures
||ARMv4 without Thumb||SA-1100|
||ARMv4 with Thumb||ARM7TDMI, ARM9TDMI, ARM720T, ARM740T, ARM920T, ARM922T, ARM940T, SC100|
||ARMv5 with Thumb and interworking||-|
||ARMv5 with Thumb, interworking, DSP multiply, and double-word instructions||ARM9E, ARM946E-S, ARM966E-S|
ARMv5 with Thumb, interworking, DSP multiply, double-word instructions, and Jazelle® extensions
armlink cannot generate Java bytecodes.
|ARM926EJ-S, ARM1026EJ-S, SC200|
||ARMv6 with Thumb, interworking, DSP multiply, double-word instructions, unaligned and mixed-endian support, Jazelle, and media extensions||ARM1136J-S, ARM1136JF-S|
||ARMv6 micro-controller profile with Thumb only, plus processor state instructions||Cortex-M1 without OS extensions, Cortex-M0, SC000, Cortex-M0plus|
||ARMv6 micro-controller profile with Thumb only, plus processor state instructions and OS extensions||Cortex-M1 with OS extensions|
||ARMv6 with SMP extensions||MPCore|
||ARMv6 with Thumb (Thumb-2 technology)||ARM1156T2-S, ARM1156T2F-S|
||ARMv6 with Security Extensions||ARM1176JZF-S, ARM1176JZ-S|
||ARMv7 with Thumb (Thumb-2 technology) only, and without hardware divide||-|
||ARMv7 application profile supporting virtual MMU-based memory systems, with ARM, Thumb (Thumb-2 technology) and ThumbEE, DSP support, and 32-bit SIMD support||Cortex-A5, Cortex-A7, Cortex-A8, Cortex-A9, Cortex-A15|
||Enables the use of the
||Cortex-A5, Cortex-A7, Cortex-A8, Cortex-A9, Cortex-A15|
||ARMv7 real-time profile with ARM, Thumb (Thumb-2 technology), DSP support, and 32-bit SIMD support||Cortex-R4, Cortex-R4F, Cortex-R7|
||ARMv7 micro-controller profile with Thumb (Thumb-2 technology) only and hardware divide||Cortex-M3, SC300|
||ARMv7-M enhanced with DSP (saturating and 32-bit SIMD) instructions||Cortex-M4|
ARMv7 is not an actual ARM architecture.
--cpu=7denotes the features that are common to the ARMv7-A, ARMv7-R, and ARMv7-M architectures. By definition, any given feature used with
--cpu=7exists on the ARMv7-A, ARMv7-R, and ARMv7-M architectures.
7-A.securityis not an actual ARM architecture, but rather, refers to
7-Aplus Security Extensions.
The following general points apply to processor and architecture options:
Selecting the processor selects the appropriate architecture, Floating-Point Unit (FPU), and memory organization.
--cpuvalues include all current ARM product names or architecture versions.
Other ARM architecture-based processors, such as the Marvell Feroceon and the Marvell XScale, are also supported.
If you specify a processor for the
--cpuoption, the generated code is optimized for that processor.
If you specify an architecture name for the
--cpuoption, the generated code can run on any processor supporting that architecture. For example,
--cpu=5TEproduces code that can be used by the ARM926EJ-S® processor.
Some specifications of
Any explicit FPU, set with
--fpuon the command line, overrides an implicit FPU.
--fpuoption is specified and no
--cpuoption is specified,
if you do not specify a
To obtain a full list of architectures and processors, use the
You cannot specify both a processor and an architecture on the same command-line.