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Image Structure and Generation
Describes the image structure and the functionality available in the ARM linker, armlink, to generate images.
- The structure of an ARM ELF image
An ARM ELF image contains sections, regions, and segments, and each link stage has a different view of the image. - Simple images
A simple image consists of a number of input sections of type RO, RW, XO, and ZI. The linker collates the input sections to form the RO, RW, XO, and ZI output sections. - Section placement with the linker
The linker places input sections in a specific order by default, but you can specify an alternative sorting order if required. - Linker support for creating demand-paged files
The linker provides features for you to create files that are memory mapped. - Linker reordering of execution regions containing Thumb code
The linker reorders execution regions containing Thumb code only if the size of the Thumb code exceeds the branch range. - Linker-generated veneers
Veneers are small sections of code generated by the linker and inserted into your program. - Command-line options used to control the generation of C++ exception tables
You can control the generation of C++ exception tables using command-line options. - Weak references and definitions
Weak references and definitions provide additional flexibility in the way the linker includes various functions and variables in a build. - How the linker performs library searching, selection, and scanning
The linker always searches user libraries before the ARM libraries. - How the linker searches for the ARM standard libraries
The linker searches for the ARM standard libraries using information specified on the command-line, or by examining environment variables. - Specifying user libraries when linking
You can specify your own libraries when linking. - How the linker resolves references
When the linker has constructed the list of libraries, it repeatedly scans each library in the list to resolve references. - The strict family of linker options
The linker provides options to overcome the limitations of the standard linker checks. - Avoiding the BLX (immediate) instruction issue on an ARM1176JZ-S or ARM1176JZF-S processor
The ARM Linker can work around the possible issue on an ARM1176JZ-S or ARM1176JZF-S processor, where a BLX (immediate) instruction might corrupt the instruction stream.