--cpu=name linker option
Enables code generation for the selected ARM processor or architecture.
Where name is the name of a processor or architecture:
If name is the name of a processor, enter it as shown on ARM data sheets, for example, ARM7TDMI, ARM1176JZ-S, MPCore.
If name is the name of an architecture, it must belong to the list of architectures shown in the following table.
Processor and architecture names are not case-sensitive.
Wildcard characters are not accepted.
|4||ARMv4 without Thumb||SA-1100|
|4T||ARMv4 with Thumb||ARM7TDMI, ARM9TDMI, ARM720T, ARM740T, ARM920T, ARM922T, ARM940T, SC100|
|5T||ARMv5 with Thumb and interworking||-|
|5TE||ARMv5 with Thumb, interworking, DSP multiply, and double-word instructions||ARM9E, ARM946E-S, ARM966E-S|
ARMv5 with Thumb, interworking, DSP multiply, double-word instructions, and Jazelle® extensions
armlink cannot generate Java bytecodes.
|ARM926EJ-S, ARM1026EJ-S, SC200|
|6||ARMv6 with Thumb, interworking, DSP multiply, double-word instructions, unaligned and mixed-endian support, Jazelle, and media extensions||ARM1136J-S, ARM1136JF-S|
|6-M||ARMv6 micro-controller profile with Thumb only, plus processor state instructions||Cortex-M1 without OS extensions, Cortex-M0, SC000, Cortex-M0plus|
|6S-M||ARMv6 micro-controller profile with Thumb only, plus processor state instructions and OS extensions||Cortex-M1 with OS extensions|
|6K||ARMv6 with SMP extensions||MPCore|
|6T2||ARMv6 with Thumb (Thumb-2 technology)||ARM1156T2-S, ARM1156T2F-S|
|6Z||ARMv6 with Security Extensions||ARM1176JZF-S, ARM1176JZ-S|
|7||ARMv7 with Thumb (Thumb-2 technology) only, and without hardware divide||-|
|7-A||ARMv7 application profile supporting virtual MMU-based memory systems, with ARM, Thumb (Thumb-2 technology) and ThumbEE, DSP support, and 32-bit SIMD support||Cortex-A5, Cortex-A7, Cortex-A8, Cortex-A9, Cortex-A15, Cortex-A17|
|7-A.security||Enables the use of the SMC instruction (formerly SMI) when assembling for the v7-A architecture||Cortex-A5, Cortex-A7, Cortex-A8, Cortex-A9, Cortex-A15, Cortex-A17|
|7-R||ARMv7 real-time profile with ARM, Thumb (Thumb-2 technology), DSP support, and 32-bit SIMD support||Cortex-R4, Cortex-R4F, Cortex-R7|
|7-M||ARMv7 micro-controller profile with Thumb (Thumb-2 technology) only and hardware divide||Cortex-M3, SC300|
|7E-M||ARMv7-M enhanced with DSP (saturating and 32-bit SIMD) instructions||Cortex-M4, Cortex-M7|
ARMv7 is not an actual ARM architecture. --cpu=7 denotes the features that are common to the ARMv7-A, ARMv7-R, and ARMv7-M architectures. By definition, any given feature used with --cpu=7 exists on the ARMv7-A, ARMv7-R, and ARMv7-M architectures.
7-A.security is not an actual ARM architecture, but rather, refers to 7-A plus Security Extensions.
- The full list of supported architectures and processors depends on your license.
The following general points apply to processor and architecture options:
Selecting the processor selects the appropriate architecture, Floating-Point Unit (FPU), and memory organization.
The supported --cpu values include all current ARM product names or architecture versions.
Other ARM architecture-based processors, such as the Marvell Feroceon and the Marvell XScale, are also supported.
If you specify a processor for the --cpu option, the generated code is optimized for that processor.
If you specify an architecture name for the --cpu option, the generated code can run on any processor supporting that architecture. For example, --cpu=5TE produces code that can be used by the ARM926EJ-S® processor.
Some specifications of --cpu imply an --fpu selection.
Any explicit FPU, set with --fpu on the command line, overrides an implicit FPU.
If no --fpu option is specified and no --cpu option is specified, --fpu=softvfp is used.
armlink assumes --cpu=ARM7TDMI if you do not specify a --cpu option.
To obtain a full list of architectures and processors, use the --cpu=list option.
You cannot specify both a processor and an architecture on the same command-line.