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Miscellaneous instructions

This section contains the following subsections:

  • BKPT


  • SVC

    Supervisor Call (formerly SWI).

  • MRS

    Move the contents of the CPSR or SPSR to a general-purpose register.

  • MSR

    Load specified fields of the CPSR or SPSR with an immediate value, or from the contents of a general-purpose register.

  • CPS

    Change Processor State.

  • SMC

    Secure Monitor Call (formerly SMI).


    Set the Endianness bit in the CPSR.

  • NOP

    No Operation.

  • SEV, WFE, WFI, and YIELD

    Set Event, Wait For Event, Wait for Interrupt, and Yield hint instructions.

  • DBG


  • DMB, DSB, and ISB

    Data Memory Barrier, Data Synchronization Barrier, and Instruction Synchronization Barrier hint instructions.

  • MAR and MRA

    Transfer between two general-purpose registers and a 40-bit internal accumulator (XScale coprocessor 0 instructions).