CPS (Change Processor State) changes one or more
of the mode, A, I, and F bits in the CPSR, without changing the
other CPSR bits.
CPS is only permitted in privileged software
execution, and has no effect in User mode.
CPS cannot be conditional, and is not permitted
in an IT block.
is one of:
Interrupt or abort enable.
Interrupt or abort disable.
is a sequence of one or more of:
Enables or disables imprecise aborts.
Enables or disables IRQ interrupts.
Enables or disables FIQ interrupts.
specifies the number of the mode to change to.