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SSAT16 and USAT16

Parallel halfword Saturating instructions.

SSAT16 saturates a signed value to a signed range.

USAT16 saturates a signed value to an unsigned range.


op{cond} Rd, #sat, Rn



is one of:


Signed saturation.


Unsigned saturation.


is an optional condition code.


is the destination register.


specifies the bit position to saturate to, and is in the range 1 to 16 for SSAT16, or 0 to 15 for USAT16.


is the register holding the operand.


Halfword-wise signed and unsigned saturation to any bit position.

The SSAT16 instruction saturates each signed halfword to the signed range -2sat-1 ≤ x ≤ 2sat-1 -1.

The USAT16 instruction saturates each signed halfword to the unsigned range 0 ≤ x ≤ 2sat -1.

Register restrictions

You cannot use PC for any register.

You can use SP in ARM instructions but these are deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.

Condition flags

If saturation occurs on either halfword, these instructions set the Q flag. To read the state of the Q flag, use an MRS instruction.


These ARM instructions are available in ARMv6 and above.

These 32-bit Thumb instructions are available in ARMv6T2 and above. For the ARMv7-M architecture, they are only available in an ARMv7E-M implementation.

There are no 16-bit Thumb versions of these instructions.


    SSAT16  r7, #12, r7
    USAT16  r0, #7, r5

Incorrect examples

    SSAT16  r1, #16, r2, LSL #4 ; shifts not permitted with halfword saturations

See also