Move to Coprocessor from ARM Register or Registers. Depending on the coprocessor, you might be able to specify various operations in addition.
is an optional condition code. In ARM code,
is not permitted for
is the name of the coprocessor the instruction is for. The standard name is
is an integer in the range 0 to 15.
is a 3-bit coprocessor-specific opcode.
is an optional 3-bit coprocessor-specific opcode.
is a 4-bit coprocessor-specific opcode.
are ARM source registers.
Rmust not be PC.
are coprocessor registers.
The use of these instructions depends on the coprocessor. See the coprocessor documentation for details.
MCR ARM instruction is available in all versions
of the ARM architecture.
MCR2 ARM instruction is available in ARMv5T
MCRR ARM instruction is available in ARMv6
and above, and E variants of ARMv5T.
MCRR2 ARM instruction is available in ARMv6
These 32-bit Thumb instructions are available in ARMv6T2 and above.
There are no 16-bit Thumb versions of these instructions.