The ARM assembler supports a number of pseudo-instructions that are translated into the appropriate combination of ARM, or Thumb instructions at assembly time.
The following topics describe pseudo-instructions:
Load a PC-relative or register-relative address into a register (medium range, position independent).
Copy a value from one register to another.
Load a register with a 32-bit immediate value or an address (unlimited range, but not position independent). Available for all ARM architectures.
Load a register with a 32-bit immediate value or an address (unlimited range, but not position independent). Available for ARMv6T2 and above only.
Negate a value in a register.
Generate an architecturally undefined instruction. Available for all ARM architectures.