Dual 16-bit Signed Multiply with Addition or Subtraction of products, and optional exchange of operand halves.
{X}{
op
cond
} {Rd
},Rn
,Rm
where:
op
is one of:
SMUAD
Dual multiply, add products.
SMUSD
Dual multiply, subtract products.
X
is an optional parameter. If
X
is present, the most and least significant halfwords of the second operand are exchanged before the multiplications occur.cond
is an optional condition code.
Rd
is the destination register.
Rn, Rm
are the registers holding the operands.
SMUAD
multiplies the bottom halfword of
with
the bottom halfword of Rn
,
and the top halfword of Rm
with
the top halfword of Rn
.
It then adds the products and stores the sum to Rm
.Rd
SMUSD
multiplies the bottom halfword of
with
the bottom halfword of Rn
,
and the top halfword of Rm
with
the top halfword of Rn
.
It then subtracts the second product from the first, and stores the
difference to Rm
.Rd
You cannot use PC for any register.
You can use SP in ARM instructions but these are deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.
These ARM instructions are available in ARMv6 and above.
These 32-bit Thumb instructions are available in ARMv6T2 and above. For the ARMv7-M architecture, they are only available in an ARMv7E-M implementation.
There are no 16-bit Thumb versions of these instructions.
- Reference