Sign extend, Sign extend with Add, Zero extend, and Zero extend with Add.
SXT<extend>{cond} {Rd},Rm{,rotation}
SXTA<extend>{cond} {Rd},Rn,Rm{,rotation}
UXT<extend>{cond} {Rd},Rm{,rotation}
UXTA<extend>{cond} {Rd},Rn,Rm{,rotation}
where:
<extend>is one of:
B16Extends two 8-bit values to two 16-bit values.
BExtends an 8-bit value to a 32-bit value.
HExtends a 16-bit value to a 32-bit value.
condis an optional condition code.
Rdis the destination register.
Rnis the register holding the number to add (
SXTAandUXTAonly).Rmis the register holding the value to extend.
rotationis one of:
ROR #8Value from
RmROR #16Value from
RmROR #24Value from
Rm
If
rotation
These instructions do the following:
Rotate the value from
RmDo one of the following to the value obtained:
Extract bits[7:0], sign or zero extend to 32 bits. If the instruction is extend and add, add the value from
RnExtract bits[15:0], sign or zero extend to 32 bits. If the instruction is extend and add, add the value from
RnExtract bits[23:16] and bits[7:0] and sign or zero extend them to 16 bits. If the instruction is extend and add, add them to bits[31:16] and bits[15:0] respectively of
Rn
You cannot use PC for any register.
You can use SP in ARM instructions but these are deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.
The following forms of these instructions are available in Thumb code, and are 16-bit instructions:
SXTBRd,RmRdRmSXTHRd,RmRdRmUXTBRd,RmRdRmUXTHRd,RmRdRm
These ARM instructions are available in ARMv6 and above.
These 32-bit Thumb instructions are available in ARMv6T2 and above. For the ARMv7-M architecture, they are only available in an ARMv7E-M implementation.
These 16-bit Thumb instructions are available in ARMv6 and above.
- Reference