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Miscellaneous instructions

The following topics describe the miscellaneous instructions:

  • BKPT

    Breakpoint.

  • SVC

    Supervisor Call (formerly SWI).

  • MRS (PSR to general-purpose register)

    Move the contents of the CPSR or SPSR to a general-purpose register.

  • MSR (general-purpose register to PSR)

    Load specified fields of the CPSR or SPSR with an immediate value, or from the contents of a general-purpose register.

  • CPS

    Change Processor State.

  • SMC

    Secure Monitor Call (formerly SMI).

  • SETEND

    Set the Endianness bit in the CPSR.

  • NOP

    No Operation.

  • SEV

    Set Event hint instruction.

  • WFE

    Wait For Event hint instruction.

  • WFI

    Wait for Interrupt hint instruction.

  • YIELD

    Yield hint instruction.

  • DBG

    Debug.

  • DMB

    Data Memory Barrier hint instruction.

  • DSB

    Data Synchronization Barrier hint instruction.

  • ISB

    Instruction Synchronization Barrier hint instruction.

  • MAR

    Transfer between two general-purpose registers and a 40-bit internal accumulator (XScale coprocessor 0 instructions).