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Pop registers off a full descending stack.


POP{cond} reglist



is an optional condition code.


is a non-empty list of registers, enclosed in braces. It can contain register ranges. It must be comma separated if it contains more than one register or register range.


POP is a synonym for LDMIA sp! reglist. POP is the preferred mnemonic.


LDM and LDMFD are synonyms of LDMIA.

Registers are stored on the stack in numerical order, with the lowest numbered register at the lowest address.

POP, with reglist including the PC

This instruction causes a branch to the address popped off the stack into the PC. This is usually a return from a subroutine, where the LR was pushed onto the stack at the start of the subroutine.

In ARMv5T and above:

  • bits[1:0] must not be 0b10

  • if bit[0] is 1, execution continues in Thumb state

  • if bit[0] is 0, execution continues in ARM state.

In ARMv4, bits[1:0] of the address loaded must be 0b00.

Thumb instructions

A subset of these instructions are available in the Thumb instruction set.

The following restriction applies to the 16-bit POP instruction:

  • reglist can only include the Lo registers and the PC.

The following restrictions apply to the 32-bit POP instruction:

  • reglist must not include the SP

  • reglist can include either the LR or the PC, but not both.

Restrictions on reglist in ARM instructions

ARM POP instructions cannot have SP but can have PC in the reglist. These instructions that include both PC and LR in the reglist are deprecated in ARMv6T2 and above.


        POP     {r0,r10,pc} ; no 16-bit version available