Subtract with Carry.
is an optional suffix. If
Sis specified, the condition code flags are updated on the result of the operation.
is an optional condition code.
is the destination register.
is the register holding the first operand.
is a flexible second operand.
SBC (Subtract with Carry) instruction subtracts
the value of
the value in
If the carry flag is clear, the result is reduced by one.
You can use
SBC to synthesize multiword arithmetic.
In certain circumstances, the assembler can substitute one instruction for another. Be aware of this when reading disassembly listings.
You cannot use PC for
any operand in an
SBC instruction that has a register-controlled
Use of PC for any operand in instructions without register-controlled shift, is deprecated.
If you use PC (
the value used is the address of the instruction plus 8.
If you use PC as
Execution branches to the address corresponding to the result.
If you use the
Ssuffix, see the
Use of SP in
SBC ARM instructions is deprecated.
The deprecation of SP and PC in ARM instructions is only in ARMv6T2 and above.
The following forms of this instruction are available in Thumb code, and are 16-bit instructions:
must both be Lo registers. This form can only be used outside an IT block.
must both be Lo registers. This form can only be used inside an IT block.
These instructions subtract one 96-bit integer contained in
R11 from another 96-bit integer contained
and place the result in
SUBS r3, r6, r9 SBCS r4, r7, r10 SBC r5, r8, r11
For clarity, the above examples use consecutive registers for multiword values. There is no requirement to do this. The following, for example, is perfectly valid:
SUBS r6, r6, r9 SBCS r9, r2, r1 SBC r2, r8, r11