This option enables code generation for the selected ARM processor or architecture.
is the name of a processor or architecture.
is the name of a processor, enter it as shown on ARM data sheets, for example,
is the name of an architecture, it must belong to the list of architectures shown in Table 3.
Processor and architecture names are not case-sensitive.
Wildcard characters are not accepted.
Table 3. Supported ARM architectures Architecture Description Example processors
ARMv4 without Thumb SA-1100
ARMv4 with Thumb ARM7TDMI, ARM9TDMI, ARM720T, ARM740T, ARM920T, ARM922T, ARM940T, SC100
ARMv5 with Thumb and interworking
ARMv5 with Thumb, interworking, DSP multiply, and double-word instructions ARM9E, ARM946E-S, ARM966E-S
ARMv5 with Thumb, interworking, DSP multiply, double-word instructions, and Jazelle® extensions[a] ARM926EJ-S, ARM1026EJ-S, SC200
ARMv6 with Thumb, interworking, DSP multiply, double-word instructions, unaligned and mixed-endian support, Jazelle, and media extensions ARM1136J-S, ARM1136JF-S
ARMv6 micro-controller profile with Thumb only plus processor state instructions Cortex-M1 without OS extensions, Cortex-M0, SC000
ARMv6 micro-controller profile with Thumb only, plus processor state instructions and OS extensions Cortex-M1 with OS extensions
ARMv6 with SMP extensions MPCore
ARMv6 with Thumb-2 ARM1156T2-S, ARM1156T2F-S
ARMv6 with Security Extensions ARM1176JZF-S, ARM1176JZ-S
ARMv7 with Thumb-2 only and without hardware divide Cortex-A5
ARMv7 application profile supporting virtual MMU-based memory systems, with ARM, Thumb-2, and Thumb-2EE instruction sets, DSP support, and 32-bit SIMD support Cortex-A8, Cortex-A9, Cortex-A15
Enables the use of the
SMI) when assembling for the v7-A architecture
Cortex-A5, Cortex-A8, Cortex-A9, Cortex-A15
ARMv7 real-time profile with ARM, Thumb-2, DSP support, and 32-bit SIMD support Cortex-R4, Cortex-R4F, Cortex-R7
ARMv7 micro-controller profile with Thumb-2 only and hardware divide Cortex-M3, SC300
ARMv7-M enhanced with DSP (saturating and 32-bit SIMD) instructions Cortex-M4
[a] The ARM compiler cannot generate Java bytecodes.
ARMv7 is not an actual ARM architecture.
the features that are common to all of the ARMv7-A, ARMv7-R, and
ARMv7-M architectures. By definition, any given feature used with
on all of the ARMv7-A, ARMv7-R, and ARMv7-M architectures.
7-A.security is not an actual ARM architecture,
but rather, refers to
7-A plus Security Extensions.
The following general points apply to processor and architecture options:
Selecting the processor selects the appropriate architecture, Floating-Point Unit (FPU), and memory organization.
--cpuvalues include all current ARM product names or architecture versions.
Other ARM architecture-based processors, such as the Marvell Feroceon and the Marvell XScale, are also supported.
If you specify a processor for the
--cpuoption, the compiled code is optimized for that processor. This enables the compiler to use specific coprocessors or instruction scheduling for optimum performance.
If you specify an architecture name for the
--cpuoption, the code is compiled to run on any processor supporting that architecture. For example,
--cpu=5TEproduces code that can be used by the ARM926EJ-S®.
Some specifications of
--fpuselection. For example, when compiling with the
Any explicit FPU, set with
--fpuon the command line, overrides an implicit FPU.
--fpuoption is specified and no
--cpuoption is specified,
Specifying a processor or architecture that supports Thumb instructions, such as
--cpu=ARM7TDMI, does not make the compiler generate Thumb code. It only enables features of the processor to be used, such as long multiply. Use the
--thumboption to generate Thumb code, unless the processor is a Thumb-only processor, for example Cortex-M4. In this case,
--thumbis not required.
Specifying the target processor or architecture might make the object code generated by the compiler incompatible with other ARM processors. For example, code compiled for architecture ARMv6 might not run on an ARM920T processor, if the compiled code includes instructions specific to ARMv6. Therefore, you must choose the lowest common denominator processor suited to your purpose.
If you are compiling code that is intended for mixed ARM/Thumb systems for processors that support ARMv4T or ARMv5T, then you must specify the interworking option
--apcs=/interwork. By default, this is enabled for processors that support ARMv5T or above.
If you compile for Thumb, that is with the
--thumboption on the command line, the compiler compiles as much of the code as possible using the Thumb instruction set. However, the compiler might generate ARM code for some parts of the compilation. For example, if you are compiling code for a Thumb-1 processor and using VFP, any function containing floating-point operations is compiled for ARM.
If the architecture you are compiling code for only supports Thumb, there is no need to specify
--thumbon the command line. For example, if compiling code for ARMv7-M with
--cpu=7-M, you do not have to specify
--thumbon the command line, because ARMv7-M only supports Thumb-2. Similarly, ARMv6-M and other Thumb-only architectures.