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This option enables code generation for the selected ARM processor or architecture.





is the name of a processor or architecture.

If name is the name of a processor, enter it as shown on ARM data sheets, for example, ARM7TDMI, ARM1176JZ-S, MPCore.

If name is the name of an architecture, it must belong to the list of architectures shown in Table 3.

Processor and architecture names are not case-sensitive.

Wildcard characters are not accepted.

Table 3. Supported ARM architectures
ArchitectureDescriptionExample processors
4ARMv4 without ThumbSA-1100
4TARMv4 with ThumbARM7TDMI, ARM9TDMI, ARM720T, ARM740T, ARM920T, ARM922T, ARM940T, SC100
5TARMv5 with Thumb and interworking 
5TEARMv5 with Thumb, interworking, DSP multiply, and double-word instructionsARM9E, ARM946E-S, ARM966E-S
5TEJARMv5 with Thumb, interworking, DSP multiply, double-word instructions, and Jazelle® extensions[a]ARM926EJ-S, ARM1026EJ-S, SC200
6ARMv6 with Thumb, interworking, DSP multiply, double-word instructions, unaligned and mixed-endian support, Jazelle, and media extensionsARM1136J-S, ARM1136JF-S
6-MARMv6 micro-controller profile with Thumb only, plus processor state instructionsCortex-M1 without OS extensions, Cortex-M0, SC000
6S-MARMv6 micro-controller profile with Thumb only, plus processor state instructions and OS extensionsCortex-M1 with OS extensions
6KARMv6 with SMP extensionsMPCore
6T2ARMv6 with 32-bit ThumbARM1156T2-S, ARM1156T2F-S
6ZARMv6 with Security ExtensionsARM1176JZF-S, ARM1176JZ-S
7ARMv7 with 32-bit Thumb only, and without hardware divideCortex-A5
7-AARMv7 application profile supporting virtual MMU-based memory systems, with ARM, 32-bit Thumb and ThumbEE instruction sets, DSP support, and 32-bit SIMD supportCortex-A8, Cortex-A9, Cortex-A15
7-A.securityEnables the use of the SMC instruction (formerly SMI) when assembling for the v7-A architectureCortex-A5, Cortex-A8, Cortex-A9, Cortex-A15
7-RARMv7 real-time profile with ARM, 32-bit Thumb, DSP support, and 32-bit SIMD supportCortex-R4, Cortex-R4F, Cortex-R7
7-MARMv7 micro-controller profile with 32-bit Thumb only and hardware divideCortex-M3, SC300
7E-MARMv7-M enhanced with DSP (saturating and 32-bit SIMD) instructionsCortex-M4

[a] The ARM compiler cannot generate Java bytecodes.


ARMv7 is not an actual ARM architecture. --cpu=7 denotes the features that are common to all of the ARMv7-A, ARMv7-R, and ARMv7-M architectures. By definition, any given feature used with --cpu=7 exists on all of the ARMv7-A, ARMv7-R, and ARMv7-M architectures. is not an actual ARM architecture, but rather, refers to 7-A plus Security Extensions.


If you do not specify a --cpu option, the compiler assumes --cpu=ARM7TDMI.

To obtain a full list of CPU architectures and processors, use the --cpu=list option.


The following general points apply to processor and architecture options:

  • Selecting the processor selects the appropriate architecture, Floating-Point Unit (FPU), and memory organization.

  • The supported --cpu values include all current ARM product names or architecture versions.

    Other ARM architecture-based processors, such as the Marvell Feroceon and the Marvell XScale, are also supported.

  • If you specify a processor for the --cpu option, the compiled code is optimized for that processor. This enables the compiler to use specific coprocessors or instruction scheduling for optimum performance.

  • If you specify an architecture name for the --cpu option, the code is compiled to run on any processor supporting that architecture. For example, --cpu=5TE produces code that can be used by the ARM926EJ-S®.

  • Some specifications of --cpu imply an --fpu selection. For example, when compiling with the --arm option, --cpu=ARM1136JF-S implies --fpu=vfpv2. Similarly, --cpu=Cortex-R4F implies --fpu=vfpv3_d16.


    Any explicit FPU, set with --fpu on the command line, overrides an implicit FPU.

  • If no --fpu option is specified and no --cpu option is specified, --fpu=softvfp is used.

  • Specifying a processor or architecture that supports Thumb instructions, such as --cpu=ARM7TDMI, does not make the compiler generate Thumb code. It only enables features of the processor to be used, such as long multiply. Use the --thumb option to generate Thumb code, unless the processor is a Thumb-only processor, for example Cortex-M4. In this case, --thumb is not required.


    Specifying the target processor or architecture might make the object code generated by the compiler incompatible with other ARM processors. For example, code compiled for architecture ARMv6 might not run on an ARM920T processor, if the compiled code includes instructions specific to ARMv6. Therefore, you must choose the lowest common denominator processor suited to your purpose.

  • If you are compiling code that is intended for mixed ARM/Thumb systems for processors that support ARMv4T or ARMv5T, then you must specify the interworking option --apcs=/interwork. By default, this is enabled for processors that support ARMv5T or above.

  • If you compile for Thumb, that is with the --thumb option on the command line, the compiler compiles as much of the code as possible using the Thumb instruction set. However, the compiler might generate ARM code for some parts of the compilation. For example, if you are compiling code for a 16-bit Thumb processor and using VFP, any function containing floating-point operations is compiled for ARM.

  • If the architecture you are compiling code for only supports Thumb, there is no need to specify --thumb on the command line. For example, if compiling code for ARMv7-M with --cpu=7-M, you do not have to specify --thumb on the command line, because ARMv7-M only supports 32-bit Thumb. Similarly, ARMv6-M and other Thumb-only architectures.


You cannot specify both a processor and an architecture on the same command-line.