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SWD connections

The following figure shows a typical Serial Wire Debug (SWD) connection scheme:

Figure 10. Typical SWD connections

Figure 10. Typical SWD connections

Note

  • The SWDIO, SWCLK and SWO signals are typically pulled up on the target to keep them stable when the debug equipment is not connected.

  • All pull-up resistors must be in the range 1K-100KΩ.

  • The VTREF signal is typically connected directly to the VDD rail. If a series resistor is used to protect against short-circuits, it must have a value no greater than 100Ω.

  • To improve signal integrity, it is good practice to provide an impedance matching resistor on the SWDIO and SWO outputs of the processor. The value of these resistors, added to the impedance of the driver must be approximately equal to 50Ω.

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