If your ASIC contains multiple devices that have a JTAG Test Access Port (TAP) controller, you must serially chain them so that can communicate with all of them simultaneously. The chaining can either be within the ASIC, or externally.
There is no support in DSTREAM for multiplexing TCK, TMS, TDI, TDO, and RTCK between a number of different processors.
The JTAG standard originally described serially chaining multiple devices on a PCB. This concept can be extended to serially chaining multiple TAP controllers within an ASIC, as shown in the following figure:
This configuration does not increase the package pin count. It does increase JTAG propagation delays, but this impact can be small if you put unaddressed TAP controllers into bypass mode.
You can use separate pins on the ASIC for each JTAG port, and serially chain them externally (for example on the PCB). This configuration can simplify device testing, and gives the greatest flexibility on the PCB. However, this is at the cost of many pins on the device package.