You copied the Doc URL to your clipboard.
There are two high-density headers fitted to the underside
of the daughterboard. These headers, designated HDRX, J1, and HDRY,
J2, route the signal and power interconnect to the motherboard and
to the other daughterboard site. See the an243_revx.ucf
constraints
files, available in application note AN243, Example LogicTile
Express 3MG design for a CoreTile Express A5x2.