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4.13. ACE intertransaction

Table 4.13 shows the ACE intertransaction rules.

Table 4.13. ACE intertransaction rules
AssertionDescriptionAMBA AXI and ACE Protocol Specification reference
ACE_ERRM_CRRESP_IN_WB_WC

If a WriteBack or WriteClean is in progress for a cacheline, from AWVALID being asserted until BVALID && BREADY, then any snoops to the same or overlapping addresses must respond with IsShared = 1 and PassDirty = 0 on the CRRESP pins.

C5.2.3
ACE_ERRM_AR_IN_CMAINT

A sharable read transaction must not be issued on an interface that has an outstanding, overlapping cache maintenance transaction.

C7.2.1
ACE_ERRM_AW_IN_CMAINT

A sharable write transaction must be issued on an interface that has an outstanding, overlapping cache maintenance transaction.

C7.2.1
ACE_ERRM_CMAINT_IN_READ

Cache maintenance operations cannot be performed if the master has outstanding sharable read transactions to the same cache line.

C7.2.1
ACE_ERRM_CMAINT_IN_WRITE

Cache maintenance operations cannot be performed if the master has outstanding sharable write transactions to the same cache line.

C7.2.1
ACE_ERRS_BRESP_IN_SNOOP

If the interconnect sends a snoop transaction to a master, it must not provide the same master with a response to a WriteUnique or WriteLineUnique transaction to the same cache line until it has received a snoop response on CRRESP to the snoop transaction.

C6.2
ACE_ERRS_AC_IN_BRESP

If the interconnect provides a master with a response to a WriteUnique or WriteLineUnique transaction, it must not send the same master a snoop transaction to the same cache line until it has received an acknowledgement of the transaction response on WACK.

C6.2
ACE_ERRS_RRESP_IN_SNOOP

If the interconnect sends a snoop transaction to a master, it must not provide the same master with a response to a transaction to the same cache line, until it has received a snoop response on CRRESP to the snoop transaction.

C6.2
ACE_ERRS_AC_IN_RRESP

If the interconnect provides a master with a response to a transaction, it must not send the same master a snoop transaction to the same cache line until it has received an acknowledgement of the transaction response on RACK.

C6.2
ACE_RECM_R_W_HAZARD

A master should not issue a read transaction to a memory region to which it is writing.

-
ACE_RECM_W_R_HAZARD

A master should not issue a write transaction to a memory region to which it is reading.

-
ACE_RECM_W_W_HAZARD

A master should not issue a write transaction to a memory region to which it is writing.

-
ACE_REC_SW_RRESP_IN_SNOOP

At any point in time, different agents should have a consistent view of the shareability of a memory region. A read response to a non-shareable transaction has been sent to the same cache line as an active snoop.

A4.5
ACE_REC_SW_AC_IN_RRESP

At any point in time, different agents should have a consistent view of the shareability of a memory region. A snoop has been received to a region that has an outstanding non-shareable read.

A4.5
ACE_REC_SW_BRESP_IN_SNOOP

At any point in time, different agents should have a consistent view of the shareability of a memory region. A write response to a non-shareable transaction has been sent to the same cache line as an active snoop.

A4.5
ACE_REC_SW_AC_IN_BRESP

At any point in time, different agents should have a consistent view of the shareability of a memory region. A snoop has been received to a region that has an outstanding non-shareable write.

A4.5
ACE_ERRM_XSTORE_IN_XSEQ

A single exclusive-capable thread must not have an exclusive store transaction in progress at the same time as any transaction that registers that a master is performing an exclusive sequence.

C9.6

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