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4.14. DVM

Table 4.14 shows the DVM rules.

Table 4.14. DVM rules
AssertionDescriptionAMBA AXI and ACE Protocol Specification reference
ACE_ERRS_DVM_COMPLETE

DVM complete message received on the AC channel, but there is no outstanding DVM message that requires a completion message.

C12.1
ACE_ERRM_DVM_COMPLETE

DVM complete message sent on the AR channel, but there is no outstanding DVM message that requires a completion message.

C12.1
ACE_ERRM_DVM_TYPES

The DVM message type indicated by ARADDR[14:12] is not supported.

Table C12-2
ACE_ERRS_DVM_TYPES

The DVM message type indicated by ACADDR[14:12] is not supported.

Table C12-2
ACE_ERRM_DVM_RESVD_1

ARADDR[4:1] and ARADDR[7] are reserved and should be zero for DVM other than DVM Hint.

Table C12-2
ACE_ERRM_DVM_RESVD_2

The ARADDR[3:0] are reserved and should be zero when conveying additional DVM address information.

Table C12-3
ACE_ERRM_DVM_RESVD_3

The ARADDR[15] should be HIGH for DVM sync messages and ARADDR[11:0] should be LOW.

Table C12-13
ACE_ERRM_DVM_RESVD_4

The ARADDR[15] should be LOW for DVM messages other than sync messages.

Table C12-2
ACE_ERRS_DVM_RESVD_1

The ACADDR[4:1] and ACADDR[7] are reserved and should be zero for DVM other than DVM Hint.

Table C12-2
ACE_ERRS_DVM_RESVD_2

The ACADDR[3:0] are reserved and should be zero when conveying DVM address information.

Table C12-3
ACE_ERRS_DVM_RESVD_3

The ACADDR[15] should be HIGH for DVM sync messages and ACADDR[11:0] should be LOW.

Table C12-13
ACE_ERRS_DVM_RESVD_4

The ACADDR[15] should be LOW for DVM messages other than sync messages.

Table C12-2
ACE_ERRM_DVM_TLB_INVThe TLB Invalidate message indicated by ARADDR is not supported.Table C12-6
ACE_ERRS_DVM_TLB_INVThe TLB Invalidate message indicated by ACADDR is not supported.Table C12-6
ACE_ERRM_DVM_BP_INVThe Branch Predictor Invalidate message indicated by ARADDR is not supported.Table C12-8
ACE_ERRS_DVM_BP_INV

The Branch Predictor Invalidate message indicated by ACADDR is not supported.

Table C12-8
ACE_ERRM_DVM_PHY_INV

The Physical Instruction Cache Invalidate message indicated by ARADDR is not supported.

Table C12-10
ACE_ERRS_DVM_PHY_INV

The Physical Instruction Cache Invalidate message indicated by ACADDR is not supported.

Table C12-10
ACE_ERRM_DVM_VIR_INV

The Virtual Instruction Cache Invalidate message indicated by ARADDR is not supported.

Table C12-12
ACE_ERRS_DVM_VIR_INV

The Virtual Instruction Cache Invalidate message indicated by ACADDR is not supported.

Table C12-12
ACE_ERRM_DVM_CTL

DVM must have the following payload values:

ARLEN = All zeros

ARBURST = 'b01

ARSIZE = data bus width

ARCACHE = 'b0010

ARLOCK = 'b0

ARDOMAIN = inner shareable or outer shareable

ARBAR[0] = 'b0

Table C12-4
ACE_ERRM_DVM_COMPLETE_CTL

DVM Complete transactions must have ARADDR = all zeros.

Table C12-4
ACE_ERRS_DVM_COMPLETE_CTL

DVM Complete transactions must have ACADDR = all zeros.

Table C12-4
ACE_ERRM_DVM_ID

A DVM message must not share IDs with non-DVM read transactions or barriers.

C12.3.5
ACE_ERRM_DVM_MULTIPART_ID

Both parts of a multipart DVM transaction must have the same ID.

C12.3.3
ACE_ERRM_DVM_SYNC

A component can have only one outstanding message requiring a completion message.

C12.2
ACE_ERRS_DVM_MULTIPART_RRESP

It is required that the response given to all parts of a multiple transaction message are the same.

C12.3.4
ACE_ERRM_DVM_MULTIPART_CRRESP

It is required that the response given to all parts of a multiple transaction message are the same.

C12.3.4
ACE_ERRM_DVM_MULTIPART_SUCCESSIVE

Multi-part DVM messages are always sent as successive transactions, and no other transaction can be interposed between them.

C12.3.3
ACE_ERRS_DVM_MULTIPART_SUCCESSIVE

Multi-part DVM messages are always sent as successive transactions, and no other transaction can be interposed between them.

C12.3.3
ACE_ERRS_DVM_LAST

A DVM response must always have RLAST asserted.

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