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4.2.7. NVIC usage hints and tips

Ensure software uses correctly aligned register accesses. The processor does not support unaligned accesses to NVIC registers.

An interrupt can enter pending state even if it is disabled. Disabling an interrupt only prevents the processor from taking that interrupt.

Before programming the optional VTOR to relocate the vector table, you must set up entries in the new vector table for all exceptions that might be taken, such as NMI, HardFault and enabled interrupts. For more information, see Vector Table Offset Register.

NVIC programming hints

Software uses the CPSIE i and CPSID i instructions to enable and disable interrupts. CMSIS provides the following intrinsic functions for these instructions:

void __disable_irq(void) // Disable Interrupts
void __enable_irq(void)  // Enable Interrupts

In addition, CMSIS provides a number of functions for NVIC control, including:

Table 4.8. CMSIS functions for NVIC control
CMSIS interrupt control functionDescription
void NVIC_EnableIRQ(IRQn_t IRQn)[a]Enable IRQn.
void NVIC_DisableIRQ(IRQn_t IRQn)[a]Disable IRQn.
uint32_t NVIC_GetPendingIRQ (IRQn_t IRQn)[a]Return true (1) if IRQn is pending.
void NVIC_SetPendingIRQ (IRQn_t IRQn)[a]Set IRQn pending.
void NVIC_ClearPendingIRQ (IRQn_t IRQn)[a]Clear IRQn pending status.
void NVIC_SetPriority (IRQn_t IRQn, uint32_t priority)[a]Set priority for IRQn.
uint32_t NVIC_GetPriority (IRQn_t IRQn)[a]Read priority of IRQn.
void NVIC_SystemReset (void)Request a system reset.

[a] The input parameter IRQn is the IRQ number, see Table 2.11 for more information.

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