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3.2. Intrinsic functions

ISO/IEC C code cannot directly access some Cortex-M0+ instructions. This section describes intrinsic functions that can generate these instructions, provided by CMSIS and that might be provided by a C compiler. If a C compiler does not support an appropriate intrinsic function, you might have to use inline assembler to access the relevant instruction.

CMSIS provides the following intrinsic functions to generate instructions that ISO/IEC C code cannot directly access:

Table 3.2. CMSIS intrinsic functions to generate some Cortex-M0+ instructions
InstructionCMSIS intrinsic function
CPSIE ivoid __enable_irq(void)
CPSID ivoid __disable_irq(void)
ISBvoid __ISB(void)
DSBvoid __DSB(void)
DMBvoid __DMB(void)
NOPvoid __NOP(void)
REVuint32_t __REV(uint32_t int value)
REV16uint32_t __REV16(uint32_t int value)
REVSHuint32_t __REVSH(uint32_t int value)
SEVvoid __SEV(void)
WFEvoid __WFE(void)
WFIvoid __WFI(void)

CMSIS also provides a number of functions for accessing the special registers using MRS and MSR instructions:

Table 3.3. CMSIS intrinsic functions to access the special registers
Special registerAccessCMSIS function
PRIMASKReaduint32_t __get_PRIMASK (void)
Writevoid __set_PRIMASK (uint32_t value)
CONTROLReaduint32_t __get_CONTROL (void)
Writevoid __set_CONTROL (uint32_t value)
MSPReaduint32_t __get_MSP (void)
Writevoid __set_MSP (uint32_t TopOfMainStack)
PSPReaduint32_t __get_PSP (void)
Writevoid __set_PSP (uint32_t TopOfProcStack)

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