To update the attributes for an MPU region, update the MPU_RNR, MPU_RBAR and MPU_RASR registers.
Simple code to configure one region:
; R1 = region number ; R2 = size/enable ; R3 = attributes ; R4 = address LDR R0,=MPU_RNR ; 0xE000ED98, MPU region number register STR R1, [R0, #0x0] ; Region Number STR R4, [R0, #0x4] ; Region Base Address STRH R2, [R0, #0x8] ; Region Size and Enable STRH R3, [R0, #0xA] ; Region Attribute
Software must use memory barrier instructions:
Before MPU setup if there might be outstanding memory transfers, such as buffered writes, that might be affected by the change in MPU settings.
After MPU setup, if the software includes memory transfers that must use the new MPU settings.
However, an instruction synchronization barrier instruction is not required if the MPU setup process starts by entering an exception handler, or is followed by an exception return, because the exception entry and exception return mechanisms cause memory barrier behavior.
For example, if you want all of the memory access behavior
to take effect immediately after the programming sequence, use a
ISB instruction. A
required after changing MPU settings, such as at the end of context
ISB is required if the code that programs
the MPU region or regions is entered using a branch or call. If
the programming sequence is entered using a return from exception,
or by taking an exception, then you do not require an
Regions are divided into eight equal-sized subregions. Set the corresponding bit in the SRD field of the MPU_RASR to disable a subregion, see MPU Region Attribute and Size Register. The least significant bit of SRD controls the first subregion, and the most significant bit controls the last subregion. Disabling a subregion means another region overlapping the disabled range matches instead. If no other enabled region overlaps the disabled subregion the MPU issues a fault.