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4.3. System Control Block

The System Control Block (SCB) provides system implementation information, and system control. This includes configuration, control, and reporting of the system exceptions. The SCB registers are:

Table 4.9. Summary of the SCB registers
AddressNameType

Reset value

Description
0xE000ED00CPUIDRO

0x410CC601[a]

CPUID Register.
0xE000ED04ICSRRW [b]0x00000000Interrupt Control and State Register.
0xE000ED08VTOR[c]RW0x00000000Vector Table Offset Register.
0xE000ED0CAIRCRRW [b]

0xFA050000

Application Interrupt and Reset Control Register.
0xE000ED10SCRRW0x00000000System Control Register .
0xE000ED14CCRRO0x00000204Configuration and Control Register.
0xE000ED1CSHPR2RW0x00000000System Handler Priority Register 2.
0xE000ED20SHPR3RW0x00000000System Handler Priority Register 3.

[a] The CPUID value is determined by the revision of the processor.

[b] See the register description for more information.

[c] If vector table offset register is implemented.


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