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3.3.3. Shift operations

Register shift operations move the bits in a register left or right by a specified number of bits, the shift length. Register shift can be performed directly by the instructions ASR, LSR, LSL, and ROR and the result is written to a destination register.

The permitted shift lengths depend on the shift type and the instruction, see the individual instruction description. If the shift length is 0, no shift occurs. Register shift operations update the carry flag except when the specified shift length is 0. The following sub-sections describe the various shift operations and how they affect the carry flag. In these descriptions, Rm is the register containing the value to be shifted, and n is the shift length.

ASR

Arithmetic shift right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n places, into the right-hand 32-n bits of the result, and it copies the original bit[31] of the register into the left-hand n bits of the result. See Figure 3.1.

You can use the ASR operation to divide the signed value in the register Rm by 2n, with the result being rounded towards negative-infinity.

When the instruction is ASRS the carry flag is updated to the last bit shifted out, bit[n-1], of the register Rm.

Note

  • If n is 32 or more, then all the bits in the result are set to the value of bit[31] of Rm.

  • If n is 32 or more and the carry flag is updated, it is updated to the value of bit[31] of Rm.

Figure 3.1. ASR #3

Figure 3.1. ASR #3

LSR

Logical shift right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n places, into the right-hand 32-n bits of the result, and it sets the left-hand n bits of the result to 0. See Figure 3.2.

You can use the LSR operation to divide the value in the register Rm by 2n, if the value is regarded as an unsigned integer.

When the instruction is LSRS, the carry flag is updated to the last bit shifted out, bit[n-1], of the register Rm.

Note

  • If n is 32 or more, then all the bits in the result are cleared to 0.

  • If n is 33 or more and the carry flag is updated, it is updated to 0.

Figure 3.2. LSR #3

Figure 3.2. LSR #3

LSL

Logical shift left by n bits moves the right-hand 32-n bits of the register Rm, to the left by n places, into the left-hand 32-n bits of the result, and it sets the right-hand n bits of the result to 0. See Figure 3.3.

You can use the LSL operation to multiply the value in the register Rm by 2n, if the value is regarded as an unsigned integer or a two’s complement signed integer. Overflow can occur without warning.

When the instruction is LSLS the carry flag is updated to the last bit shifted out, bit[32-n], of the register Rm. These instructions do not affect the carry flag when used with LSL #0.

Note

  • If n is 32 or more, then all the bits in the result are cleared to 0.

  • If n is 33 or more and the carry flag is updated, it is updated to 0.

Figure 3.3. LSL #3

Figure 3.3. LSL #3

ROR

Rotate right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n places, into the right-hand 32-n bits of the result, and it moves the right-hand n bits of the register into the left-hand n bits of the result. See Figure 3.4.

When the instruction is RORS the carry flag is updated to the last bit rotation, bit[n-1], of the register Rm.

Note

  • If n is 32, then the value of the result is same as the value in Rm, and if the carry flag is updated, it is updated to bit[31] of Rm.

  • ROR with shift length, n, greater than 32 is the same as ROR with shift length n-32.

Figure 3.4. ROR #3

Figure 3.4. ROR #3

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