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3.4. Memory access instructions

Table 3.5 shows the memory access instructions:

Table 3.5. Memory access instructions
Mnemonic Brief description See
ADR Generate PC-relative address ADR.
LDM Load Multiple registers LDM and STM.
LDR{type} Load Register using immediate offset LDR and STR, immediate offset.
LDR{type} Load Register using register offset LDR and STR, register offset.
LDR Load Register from PC-relative address LDR, PC‑relative.
POP Pop registers from stack PUSH and POP.
PUSH Push registers onto stack PUSH and POP.
STM Store Multiple registers LDM and STM.
STR{type} Store Register using immediate offset LDR and STR, immediate offset.
STR{type} Store Register using register offset LDR and STR, register offset.

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