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2.2.4. Software ordering of memory accesses

The order of instructions in the program flow does not always guarantee the order of the corresponding memory transactions. This is because:

  • A processor can reorder some memory accesses to improve efficiency, providing this does not affect the behavior of the instruction sequence.

  • Memory or devices in the memory map might have different wait states.

  • Some memory accesses are buffered or speculative.

Memory system ordering of memory accesses describes the cases where the memory system guarantees the order of memory accesses. Otherwise, if the order of memory accesses is critical, software must include memory barrier instructions to force that ordering. The processor provides the following memory barrier instructions:

DMB

The Data Memory Barrier (DMB) instruction ensures that outstanding memory transactions complete before subsequent memory transactions. See DMB.

DSB

The Data Synchronization Barrier (DSB) instruction ensures that outstanding memory transactions complete before subsequent instructions execute. See DSB.

ISB

The Instruction Synchronization Barrier (ISB) ensures that the effect of all completed memory transactions is recognizable by subsequent instructions. See ISB.

The following are examples of using memory barrier instructions:

Vector table

If the program changes an entry in the vector table, and then enables the corresponding exception, use a DMB instruction between the operations. This ensures that if the exception is taken immediately after being enabled the processor uses the new exception vector.

Self-modifying code

If a program contains self-modifying code, use a DSB instruction, followed by an ISB instruction, immediately after the code modification in the program. This ensures subsequent instruction execution uses the updated program.

Memory map switching

If the system contains a memory map switching mechanism, use a DSB instruction, followed by an ISB instruction, after switching the memory map. This ensures subsequent instruction execution uses the updated memory map.

MPU programming

Use a DSB instruction, followed by an ISB instruction or exception return, to ensure that the new MPU configuration is used by subsequent instructions.

VTOR programming

If the program updates the value of the VTOR, use a DSB instruction to ensure that the new vector table is used for subsequent exceptions.

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