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About ARMv8 terminology

ARMv8 introduces a number of terms to describe the state of the integer register bank and supported instruction sets.

ARMv8 introduces the following terms to describe the state of the integer register bank:

AArch32
The state in which the integer registers are 32-bit. There are 16 unbanked registers available in this state.
AArch64

The state in which the integer registers are 64-bit. There are 31 unbanked registers (0 to 30) available in this state, with register number 31 being a special case.

The unbanked registers can be accessed as either 32-bit registers (bits 0 to 31 only) or 64-bit registers.

Register number 31 represents:

Zero Register
In most cases register number 31 reads as zero when used as a source register, and discards the result when used as a destination register.
Stack Pointer
When used as a load/store base register, and in a small selection of arithmetic instructions, register number 31 provides access to the current stack pointer.

The PC is never accessible as a named register.

ARMv8 introduces the following terms to describe the instruction sets supported:

A32
An alias for the ARM instruction set that uses 32-bit encoded instructions. It is available in AArch32 state.
T32
An alias for the Thumb instruction set that uses 16-bit and 32-bit encoded instructions. It is available in AArch32 state. T32 support incorporates Thumb-2 technology.
A64
The instruction set available in AArch64 state. It uses 32-bit encoded instructions.

Note

The terms ARM and Thumb are used for features that are equivalent in A32 and T32 respectively. If a feature has no equivalent, then A32 or T32 is used as required.

Note

Detailed information about the ARMv8 architecture is available under license. Contact your ARM Account Representative for details.
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