VLDM (floating-point)
Extension register load multiple.
Syntax
VLDM
{mode
}
cond
{!},
Rn
Registers
where:
mode
must be one of:
IA
meaning Increment address After each transfer.
IA
is the default, and can be omitted.DB
meaning Decrement address Before each transfer.
EA
meaning Empty Ascending stack operation. This is the same as
DB
for loads.FD
meaning Full Descending stack operation. This is the same as
IA
for loads.
cond
is an optional condition code.
Rn
is the ARM register holding the base address for the transfer.
!
is optional.
!
specifies that the updated base address must be written back toRn
. If!
is not specified,mode
must beIA
.Registers
is a list of consecutive extension registers enclosed in braces, { and }. The list can be comma-separated, or in range format. There must be at least one register in the list.
You can specify
S
orD
registers, but they must not be mixed. The number of registers must not exceed 16D
registers.
Note
VPOP
is
equivalent to Registers
VLDM sp!,
. Registers
You can use either form of this instruction. They both disassemble
to VPOP
.