BIC
Bit Clear.
Syntax
BIC
{S
}{
}
cond
, Rd
,
Rn
Operand2
where:
S
is an optional suffix. If S is specified, the condition flags are updated on the result of the operation.
cond
is an optional condition code.
Rd
is the destination register.
Rn
is the register holding the first operand.
Operand2
is a flexible second operand.
Operation
The BIC
(Bit Clear) instruction
performs an AND operation on the bits in Rn
with
the complements of the corresponding bits in the value of Operand2
.
In certain circumstances, the assembler can substitute BIC
for AND
,
or AND
for BIC
.
Be aware of this when reading disassembly listings.
Use of PC in T32 instructions
You cannot use PC (R15
) for
Rd
or any operand in a BIC
instruction.
Use of PC and SP in A32 instructions
You can use PC and SP with the BIC
instruction but they are deprecated.
If you use PC as Rn
, the value
used is the address of the instruction plus 8.
If you use PC as Rd
:
-
Execution branches to the address corresponding to the result.
-
If you use the S suffix, see the
SUBS pc,lr
instruction.
You cannot use PC for any operand in any data processing instruction that has a register-controlled shift.
Condition flags
If S is specified, the BIC
instruction:
Updates the N and Z flags according to the result.
Can update the C flag during the calculation of
Operand2
.Does not affect the V flag.
16-bit instructions
The following forms of the BIC
instruction are available in T32 code, and are 16-bit instructions:
BICS
Rd
,Rd
,Rm
-
andRd
must both be Lo registers. This form can only be used outside an IT block.Rm
BIC{
cond
}Rd
,Rd
,Rm
-
andRd
must both be Lo registers. This form can only be used inside an IT block.Rm
Example
BIC r0, r1, #0xab