You copied the Doc URL to your clipboard.

MRS (PSR to general-purpose register)

Move the contents of a PSR to a general-purpose register.

Syntax

MRS{cond} Rd, psr

where:

cond

is an optional condition code.

Rd

is the destination register.

psr

is one of:

APSR: on any processor, in any mode.
CPSR: deprecated synonym for APSR and for use in Debug state, on any processor except ARMv7-M and ARMv6-M.
SPSR: on any processor except ARMv7-M and ARMv6-M, in privileged software execution only.
Mpsr: on ARMv7-M and ARMv6-M processors only.

Mpsr

can be any of: IPSR, EPSR, IEPSR, IAPSR, EAPSR, MSP, PSP, XPSR, PRIMASK, BASEPRI, BASEPRI_MAX, FAULTMASK, or CONTROL.

Usage

Use MRS in combination with MSR as part of a read-modify-write sequence for updating a PSR, for example to change processor mode, or to clear the Q flag.

In process swap code, the programmers' model state of the process being swapped out must be saved, including relevant PSR contents. Similarly, the state of the process being swapped in must also be restored. These operations make use of MRS/store and load/MSR instruction sequences.

SPSR

You must not attempt to access the SPSR when the processor is in User or System mode. This is your responsibility. The assembler cannot warn you about this, because it has no information about the processor mode at execution time.

CPSR

ARM deprecates reading the CPSR endianness bit (E) with an MRS instruction.

The CPSR execution state bits, other than the E bit, can only be read when the processor is in Debug state, halting debug-mode. Otherwise, the execution state bits in the CPSR read as zero.

The condition flags can be read in any mode on any processor. Use APSR if you are only interested in accessing the condition flags in User mode.