SMULWy
Signed Multiply Wide, with one 32-bit and one 16-bit operand, providing the top 32 bits of the result.
Syntax
SMULW<ycondRdRnRm
where:
- <
y> is either B or T. B means use the bottom half (bits [15:0]) of
Rm, T means use the top half (bits [31:16]) ofRm.condis an optional condition code.
Rdis the destination register.
Rn, Rmare the registers holding the values to be multiplied.
Operation
SMULWy multiplies the signed integer
from the selected half of Rm by
the signed integer from Rn, and
places the upper 32-bits of the 48-bit result in Rd.
Register restrictions
You cannot use PC for any operand.
You can use SP in A32 instructions but this is deprecated. You cannot use SP in T32 instructions.
Condition flags
This instruction does not affect the N, Z, C, or V flags.
Availability
The 32-bit instruction is available in A32 and T32.
There is no 16-bit version of this instruction in T32.