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VMOV (between an ARM register and half a double precision floating-point register)
Transfer contents between an ARM register and half a double precision floating-point register.
Syntax
VMOV
{
}{.cond
}
size
[Dn
],
x
Rd
VMOV
{
}{.cond
} size
, Rd
[Dn
] x
where:
cond
is an optional condition code.
size
the data size. Must be either
32
or omitted. If omitted,
issize
32
.Dn
[x
]is the upper or lower half of a double precision floating-point register.
Rd
is the ARM register.
must not be PC.Rd
Operation
VMOV
transfers the contents of Dn
[x], Rd
Rd
into Dn
[x].
VMOV
transfers the contents of Rd
, Dn
[x]Dn
[x] into Rd
.