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# ST2 (vector, single structure)

Store single 2-element structure from one lane of two registers.

### Syntax

``` ST2 { Vt.B, Vt2.B }[index], [Xn|SP] ; T2 ```

``` ST2 { Vt.H, Vt2.H }[index], [Xn|SP] ; T2 ```

``` ST2 { Vt.S, Vt2.S }[index], [Xn|SP] ; T2 ```

``` ST2 { Vt.D, Vt2.D }[index], [Xn|SP] ; T2 ```

``` ST2 { Vt.B, Vt2.B }[index], [Xn|SP], #2 ; T2 ```

``` ST2 { Vt.B, Vt2.B }[index], [Xn|SP], Xm ; T2 ```

``` ST2 { Vt.H, Vt2.H }[index], [Xn|SP], #4 ; T2 ```

``` ST2 { Vt.H, Vt2.H }[index], [Xn|SP], Xm ; T2 ```

``` ST2 { Vt.S, Vt2.S }[index], [Xn|SP], #8 ; T2 ```

``` ST2 { Vt.S, Vt2.S }[index], [Xn|SP], Xm ; T2 ```

``` ST2 { Vt.D, Vt2.D }[index], [Xn|SP], #16 ; T2 ```

``` ST2 { Vt.D, Vt2.D }[index], [Xn|SP], Xm ; T2 ```

Where:

`Vt`

Is the name of the first or only SIMD and FP register to be transferred.

`Vt2`

Is the name of the second SIMD and FP register to be transferred.

`index`

The value depends on the instruction variant:

8
Is the element index, in the range 0 to 15
16
Is the element index, in the range 0 to 7
32
Is the element index, in the range 0 to 3
64
Is the element index, and can be either 0 or 1
`Xn|SP`

Is the 64-bit name of the general-purpose base register or stack pointer.

`Xm`

Is the 64-bit name of the general-purpose post-index register, excluding XZR.