Floating-point exceptions for Advanced SIMD in A32/T32 instructions
The Advanced SIMD extension records floating-point exceptions in the FPSCR cumulative flags.
It records the following exceptions:
- Invalid operation
The exception is caused if the result of an operation has no mathematical value or cannot be represented.
- Division by zero
The exception is caused if a divide operation has a zero divisor and a dividend that is not zero, an infinity or a NaN.
The exception is caused if the absolute value of the result of an operation, produced after rounding, is greater than the maximum positive normalized number for the destination precision.
The exception is caused if the absolute value of the result of an operation, produced before rounding, is less than the minimum positive normalized number for the destination precision, and the rounded result is inexact.
The exception is caused if the result of an operation is not equivalent to the value that would be produced if the operation were performed with unbounded precision and exponent range.
- Input denormal
The exception is caused if a denormalized input operand is replaced in the computation by a zero.
The descriptions of the Advanced SIMD instructions that can cause floating-point exceptions include a subsection listing the exceptions. If there is no such subsection, that instruction cannot cause any floating-point exception.