You copied the Doc URL to your clipboard.

LDRH (immediate)

Load Register Halfword (immediate).


LDRH Wt, [Xn|SP], #simm ; Post-index general registers

LDRH Wt, [Xn|SP, #simm]! ; Pre-index general registers

LDRH Wt, [Xn|SP{, #pimm}] ; Unsigned offset general registers



Is the signed immediate byte offset, in the range -256 to 255.


Is the optional positive immediate byte offset, a multiple of 2 in the range 0 to 8190, defaulting to 0.


Is the 32-bit name of the general-purpose register to be transferred.


Is the 64-bit name of the general-purpose base register or stack pointer.


Load Register Halfword (immediate) calculates an address from a base register value and an immediate offset, loads a halfword from memory, zero-extends it, and writes it to a register. For information about memory accesses, see Load/Store addressing modes in the ARMv8-A Architecture Reference Manual.


For information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors in the ARMv8-A Architecture Reference Manual, and particularly LDRH (immediate) in the ARMv8-A Architecture Reference Manual.