VREV16, VREV32, and VREV64
Vector Reverse within halfwords, words, or doublewords.
Syntax
VREV{ncondsizeQdQm
VREV{ncondsizeDdDm
where:
nmust be one of
16,32, or64.condis an optional condition code.
sizemust be one of
8,16, or32, and must be less thannQd, Qmspecifies the destination vector and the operand vector, for a quadword operation.
Dd, Dmspecifies the destination vector and the operand vector, for a doubleword operation.
Operation
VREV16 reverses the order of 8-bit elements within each halfword of the
vector, and places the result in the corresponding destination vector.
VREV32 reverses the order of 8-bit or 16-bit elements within each word of
the vector, and places the result in the corresponding destination vector.
VREV64 reverses the order of 8-bit, 16-bit, or 32-bit elements within each
doubleword of the vector, and places the result in the corresponding destination vector.