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SIMD Vector instructions in alphabetical order
summary of the A64 SIMD Vector instructions that are supported.
Table 20-1 Summary of A64 SIMD Vector instructions
Mnemonic | Brief description | See |
---|---|---|
ABS (vector) |
Absolute value (vector) | ABS (vector) |
ADD (vector) |
Add (vector) | ADD (vector) |
ADDHN , ADDHN2 (vector) |
Add returning High Narrow | ADDHN, ADDHN2 (vector) |
ADDP (vector) |
Add Pairwise (vector) | ADDP (vector) |
ADDV (vector) |
Add across Vector | ADDV (vector) |
AND (vector) |
Bitwise AND (vector) | AND (vector) |
BIC (vector, immediate) |
Bitwise bit Clear (vector, immediate) | BIC (vector, immediate) |
BIC (vector, register) |
Bitwise bit Clear (vector, register) | BIC (vector, register) |
BIF (vector) |
Bitwise Insert if False | BIF (vector) |
BIT (vector) |
Bitwise Insert if True | BIT (vector) |
BSL (vector) |
Bitwise Select | BSL (vector) |
CLS (vector) |
Count Leading Sign bits (vector) | CLS (vector) |
CLZ (vector) |
Count Leading Zero bits (vector) | CLZ (vector) |
CMEQ (vector, register) |
Compare bitwise Equal (vector) | CMEQ (vector, register) |
CMEQ (vector, zero) |
Compare bitwise Equal to zero (vector) | CMEQ (vector, zero) |
CMGE (vector, register) |
Compare signed Greater than or Equal (vector) | CMGE (vector, register) |
CMGE (vector, zero) |
Compare signed Greater than or Equal to zero (vector) | CMGE (vector, zero) |
CMGT (vector, register) |
Compare signed Greater than (vector) | CMGT (vector, register) |
CMGT (vector, zero) |
Compare signed Greater than zero (vector) | CMGT (vector, zero) |
CMHI (vector, register) |
Compare unsigned Higher (vector) | CMHI (vector, register) |
CMHS (vector, register) |
Compare unsigned Higher or Same (vector) | CMHS (vector, register) |
CMLE (vector, zero) |
Compare signed Less than or Equal to zero (vector) | CMLE (vector, zero) |
CMLT (vector, zero) |
Compare signed Less than zero (vector) | CMLT (vector, zero) |
CMTST (vector) |
Compare bitwise Test bits nonzero (vector) | CMTST (vector) |
CNT (vector) |
Population Count per byte | CNT (vector) |
DUP (vector, element) |
vector | DUP (vector, element) |
DUP (vector, general) |
Duplicate general-purpose register to vector | DUP (vector, general) |
EOR (vector) |
Bitwise Exclusive OR (vector) | EOR (vector) |
EXT (vector) |
Extract vector from pair of vectors | EXT (vector) |
FABD (vector) |
Floating-point Absolute Difference (vector) | FABD (vector) |
FABS (vector) |
Floating-point Absolute value (vector) | FABS (vector) |
FACGE (vector) |
Floating-point Absolute Compare Greater than or Equal (vector) | FACGE (vector) |
FACGT (vector) |
Floating-point Absolute Compare Greater than (vector) | FACGT (vector) |
FADD (vector) |
Floating-point Add (vector) | FADD (vector) |
FADDP (vector) |
Floating-point Add Pairwise (vector) | FADDP (vector) |
FCADD (vector) |
Floating-point Complex Add | FCADD (vector) |
FCMEQ (vector, register) |
Floating-point Compare Equal (vector) | FCMEQ (vector, register) |
FCMEQ (vector, zero) |
Floating-point Compare Equal to zero (vector) | FCMEQ (vector, zero) |
FCMGE (vector, register) |
Floating-point Compare Greater than or Equal (vector) | FCMGE (vector, register) |
FCMGE (vector, zero) |
Floating-point Compare Greater than or Equal to zero (vector) | FCMGE (vector, zero) |
FCMGT (vector, register) |
Floating-point Compare Greater than (vector) | FCMGT (vector, register) |
FCMGT (vector, zero) |
Floating-point Compare Greater than zero (vector) | FCMGT (vector, zero) |
FCMLA (vector) |
Floating-point Complex Multiply Accumulate | FCMLA (vector) |
FCMLE (vector, zero) |
Floating-point Compare Less than or Equal to zero (vector) | FCMLE (vector, zero) |
FCMLT (vector, zero) |
Floating-point Compare Less than zero (vector) | FCMLT (vector, zero) |
FCVTAS (vector) |
Floating-point Convert to Signed integer, rounding to nearest with ties to Away (vector) | FCVTAS (vector) |
FCVTAU (vector) |
Floating-point Convert to Unsigned integer, rounding to nearest with ties to Away (vector) | FCVTAU (vector) |
FCVTL , FCVTL2 (vector) |
Floating-point Convert to higher precision Long (vector) | FCVTL, FCVTL2 (vector) |
FCVTMS (vector) |
Floating-point Convert to Signed integer, rounding toward Minus infinity (vector) | FCVTMS (vector) |
FCVTMU (vector) |
Floating-point Convert to Unsigned integer, rounding toward Minus infinity (vector) | FCVTMU (vector) |
FCVTN , FCVTN2 (vector) |
Floating-point Convert to lower precision Narrow (vector) | FCVTN, FCVTN2 (vector) |
FCVTNS (vector) |
Floating-point Convert to Signed integer, rounding to nearest with ties to even (vector) | FCVTNS (vector) |
FCVTNU (vector) |
Floating-point Convert to Unsigned integer, rounding to nearest with ties to even (vector) | FCVTNU (vector) |
FCVTPS (vector) |
Floating-point Convert to Signed integer, rounding toward Plus infinity (vector) | FCVTPS (vector) |
FCVTPU (vector) |
Floating-point Convert to Unsigned integer, rounding toward Plus infinity (vector) | FCVTPU (vector) |
FCVTXN , FCVTXN2 (vector) |
Floating-point Convert to lower precision Narrow, rounding to odd (vector) | FCVTXN, FCVTXN2 (vector) |
FCVTZS (vector, fixed-point) |
Floating-point Convert to Signed fixed-point, rounding toward Zero (vector) | FCVTZS (vector, fixed-point) |
FCVTZS (vector, integer) |
Floating-point Convert to Signed integer, rounding toward Zero (vector) | FCVTZS (vector, integer) |
FCVTZU (vector, fixed-point) |
Floating-point Convert to Unsigned fixed-point, rounding toward Zero (vector) | FCVTZU (vector, fixed-point) |
FCVTZU (vector, integer) |
Floating-point Convert to Unsigned integer, rounding toward Zero (vector) | FCVTZU (vector, integer) |
FDIV (vector) |
Floating-point Divide (vector) | FDIV (vector) |
FMAX (vector) |
Floating-point Maximum (vector) | FMAX (vector) |
FMAXNM (vector) |
Floating-point Maximum Number (vector) | FMAXNM (vector) |
FMAXNMP (vector) |
Floating-point Maximum Number Pairwise (vector) | FMAXNMP (vector) |
FMAXNMV (vector) |
Floating-point Maximum Number across Vector | FMAXNMV (vector) |
FMAXP (vector) |
Floating-point Maximum Pairwise (vector) | FMAXP (vector) |
FMAXV (vector) |
Floating-point Maximum across Vector | FMAXV (vector) |
FMIN (vector) |
Floating-point minimum (vector) | FMIN (vector) |
FMINNM (vector) |
Floating-point Minimum Number (vector) | FMINNM (vector) |
FMINNMP (vector) |
Floating-point Minimum Number Pairwise (vector) | FMINNMP (vector) |
FMINNMV (vector) |
Floating-point Minimum Number across Vector | FMINNMV (vector) |
FMINP (vector) |
Floating-point Minimum Pairwise (vector) | FMINP (vector) |
FMINV (vector) |
Floating-point Minimum across Vector | FMINV (vector) |
FMLA (vector, by element) |
Floating-point fused Multiply-Add to accumulator (by element) | FMLA (vector, by element) |
FMLA (vector) |
Floating-point fused Multiply-Add to accumulator (vector) | FMLA (vector) |
FMLS (vector, by element) |
Floating-point fused Multiply-Subtract from accumulator (by element) | FMLS (vector, by element) |
FMLS (vector) |
Floating-point fused Multiply-Subtract from accumulator (vector) | FMLS (vector) |
FMOV (vector, immediate) |
Floating-point move immediate (vector) | FMOV (vector, immediate) |
FMUL (vector, by element) |
Floating-point Multiply (by element) | FMUL (vector, by element) |
FMUL (vector) |
Floating-point Multiply (vector) | FMUL (vector) |
FMULX (vector, by element) |
Floating-point Multiply extended (by element) | FMULX (vector, by element) |
FMULX (vector) |
Floating-point Multiply extended | FMULX (vector) |
FNEG (vector) |
Floating-point Negate (vector) | FNEG (vector) |
FRECPE (vector) |
Floating-point Reciprocal Estimate | FRECPE (vector) |
FRECPS (vector) |
Floating-point Reciprocal Step | FRECPS (vector) |
FRECPX (vector) |
Floating-point Reciprocal exponent (scalar) | FRECPX (vector) |
FRINTA (vector) |
Floating-point Round to Integral, to nearest with ties to Away (vector) | FRINTA (vector) |
FRINTI (vector) |
Floating-point Round to Integral, using current rounding mode (vector) | FRINTI (vector) |
FRINTM (vector) |
Floating-point Round to Integral, toward Minus infinity (vector) | FRINTM (vector) |
FRINTN (vector) |
Floating-point Round to Integral, to nearest with ties to even (vector) | FRINTN (vector) |
FRINTP (vector) |
Floating-point Round to Integral, toward Plus infinity (vector) | FRINTP (vector) |
FRINTX (vector) |
Floating-point Round to Integral exact, using current rounding mode (vector) | FRINTX (vector) |
FRINTZ (vector) |
Floating-point Round to Integral, toward Zero (vector) | FRINTZ (vector) |
FRSQRTE (vector) |
Floating-point Reciprocal Square Root Estimate | FRSQRTE (vector) |
FRSQRTS (vector) |
Floating-point Reciprocal Square Root Step | FRSQRTS (vector) |
FSQRT (vector) |
Floating-point Square Root (vector) | FSQRT (vector) |
FSUB (vector) |
Floating-point Subtract (vector) | FSUB (vector) |
INS (vector, element) |
Insert vector element from another vector element | INS (vector, element) |
INS (vector, general) |
Insert vector element from general-purpose register | INS (vector, general) |
LD1 (vector, multiple structures) |
Load multiple single-element structures to one, two, three, or four registers | LD1 (vector, multiple structures) |
LD1 (vector, single structure) |
Load one single-element structure to one lane of one register | LD1 (vector, single structure) |
LD1R (vector) |
Load one single-element structure and Replicate to all lanes (of one register) | LD1R (vector) |
LD2 (vector, multiple structures) |
Load multiple 2-element structures to two registers | LD2 (vector, multiple structures) |
LD2 (vector, single structure) |
Load single 2-element structure to one lane of two registers | LD2 (vector, single structure) |
LD2R (vector) |
Load single 2-element structure and Replicate to all lanes of two registers | LD2R (vector) |
LD3 (vector, multiple structures) |
Load multiple 3-element structures to three registers | LD3 (vector, multiple structures) |
LD3 (vector, single structure) |
Load single 3-element structure to one lane of three registers) | LD3 (vector, single structure) |
LD3R (vector) |
Load single 3-element structure and Replicate to all lanes of three registers | LD3R (vector) |
LD4 (vector, multiple structures) |
Load multiple 4-element structures to four registers | LD4 (vector, multiple structures) |
LD4 (vector, single structure) |
Load single 4-element structure to one lane of four registers | LD4 (vector, single structure) |
LD4R (vector) |
Load single 4-element structure and Replicate to all lanes of four registers | LD4R (vector) |
MLA (vector, by element) |
Multiply-Add to accumulator (vector, by element) | MLA (vector, by element) |
MLA (vector) |
Multiply-Add to accumulator (vector) | MLA (vector) |
MLS (vector, by element) |
Multiply-Subtract from accumulator (vector, by element) | MLS (vector, by element) |
MLS (vector) |
Multiply-Subtract from accumulator (vector) | MLS (vector) |
MOV (vector, element) |
Move vector element to another vector element | MOV (vector, element) |
MOV (vector, from general) |
Move general-purpose register to a vector element | MOV (vector, from general) |
MOV (vector) |
Move vector | MOV (vector) |
MOV (vector, to general) |
Move vector element to general-purpose register | MOV (vector, to general) |
MOVI (vector) |
Move Immediate (vector) | MOVI (vector) |
MUL (vector, by element) |
Multiply (vector, by element) | MUL (vector, by element) |
MUL (vector) |
Multiply (vector) | MUL (vector) |
MVN (vector) |
Bitwise NOT (vector) | MVN (vector) |
MVNI (vector) |
Move inverted Immediate (vector) | MVNI (vector) |
NEG (vector) |
Negate (vector) | NEG (vector) |
NOT (vector) |
Bitwise NOT (vector) | NOT (vector) |
ORN (vector) |
Bitwise inclusive OR NOT (vector) | ORN (vector) |
ORR (vector, immediate) |
Bitwise inclusive OR (vector, immediate) | ORR (vector, immediate) |
ORR (vector, register) |
Bitwise inclusive OR (vector, register) | ORR (vector, register) |
PMUL (vector) |
Polynomial Multiply | PMUL (vector) |
PMULL , PMULL2 (vector) |
Polynomial Multiply Long | PMULL, PMULL2 (vector) |
RADDHN , RADDHN2 (vector) |
Rounding Add returning High Narrow | RADDHN, RADDHN2 (vector) |
RBIT (vector) |
Reverse Bit order (vector) | RBIT (vector) |
REV16 (vector) |
Reverse elements in 16-bit halfwords (vector) | REV16 (vector) |
REV32 (vector) |
Reverse elements in 32-bit words (vector) | REV32 (vector) |
REV64 (vector) |
Reverse elements in 64-bit doublewords (vector) | REV64 (vector) |
RSHRN , RSHRN2 (vector) |
Rounding Shift Right Narrow (immediate) | RSHRN, RSHRN2 (vector) |
RSUBHN , RSUBHN2 (vector) |
Rounding Subtract returning High Narrow | RSUBHN, RSUBHN2 (vector) |
SABA (vector) |
Signed Absolute difference and Accumulate | SABA (vector) |
SABAL , SABAL2 (vector) |
Signed Absolute difference and Accumulate Long | SABAL, SABAL2 (vector) |
SABD (vector) |
Signed Absolute Difference | SABD (vector) |
SABDL , SABDL2 (vector) |
Signed Absolute Difference Long | SABDL, SABDL2 (vector) |
SADALP (vector) |
Signed Add and Accumulate Long Pairwise | SADALP (vector) |
SADDL , SADDL2 (vector) |
Signed Add Long (vector) | SADDL, SADDL2 (vector) |
SADDLP (vector) |
Signed Add Long Pairwise | SADDLP (vector) |
SADDLV (vector) |
Signed Add Long across Vector | SADDLV (vector) |
SADDW , SADDW2 (vector) |
Signed Add Wide | SADDW, SADDW2 (vector) |
SCVTF (vector, fixed-point) |
Signed fixed-point Convert to Floating-point (vector) | SCVTF (vector, fixed-point) |
SCVTF (vector, integer) |
Signed integer Convert to Floating-point (vector) | SCVTF (vector, integer) |
SHADD (vector) |
Signed Halving Add | SHADD (vector) |
SHL (vector) |
Shift Left (immediate) | SHL (vector) |
SHLL , SHLL2 (vector) |
Shift Left Long (by element size) | SHLL, SHLL2 (vector) |
SHRN , SHRN2 (vector) |
Shift Right Narrow (immediate) | SHRN, SHRN2 (vector) |
SHSUB (vector) |
Signed Halving Subtract | SHSUB (vector) |
SLI (vector) |
Shift Left and Insert (immediate) | SLI (vector) |
SMAX (vector) |
Signed Maximum (vector) | SMAX (vector) |
SMAXP (vector) |
Signed Maximum Pairwise | SMAXP (vector) |
SMAXV (vector) |
Signed Maximum across Vector | SMAXV (vector) |
SMIN (vector) |
Signed Minimum (vector) | SMIN (vector) |
SMINP (vector) |
Signed Minimum Pairwise | SMINP (vector) |
SMINV (vector) |
Signed Minimum across Vector | SMINV (vector) |
SMLAL , SMLAL2 (vector, by element) |
Signed Multiply-Add Long (vector, by element) | SMLAL, SMLAL2 (vector, by element) |
SMLAL , SMLAL2 (vector) |
Signed Multiply-Add Long (vector) | SMLAL, SMLAL2 (vector) |
SMLSL , SMLSL2 (vector, by element) |
Signed Multiply-Subtract Long (vector, by element) | SMLSL, SMLSL2 (vector, by element) |
SMLSL , SMLSL2 (vector) |
Signed Multiply-Subtract Long (vector) | SMLSL, SMLSL2 (vector) |
SMOV (vector) |
Signed Move vector element to general-purpose register | SMOV (vector) |
SMULL , SMULL2 (vector, by element) |
Signed Multiply Long (vector, by element) | SMULL, SMULL2 (vector, by element) |
SMULL , SMULL2 (vector) |
Signed Multiply Long (vector) | SMULL, SMULL2 (vector) |
SQABS (vector) |
Signed saturating Absolute value | SQABS (vector) |
SQADD (vector) |
Signed saturating Add | SQADD (vector) |
SQDMLAL , SQDMLAL2 (vector, by element) |
Signed saturating Doubling Multiply-Add Long (by element) | SQDMLAL, SQDMLAL2 (vector, by element) |
SQDMLAL , SQDMLAL2 (vector) |
Signed saturating Doubling Multiply-Add Long | SQDMLAL, SQDMLAL2 (vector) |
SQDMLSL , SQDMLSL2 (vector, by element) |
Signed saturating Doubling Multiply-Subtract Long (by element) | SQDMLSL, SQDMLSL2 (vector, by element) |
SQDMLSL , SQDMLSL2 (vector) |
Signed saturating Doubling Multiply-Subtract Long | SQDMLSL, SQDMLSL2 (vector) |
SQDMULH (vector, by element) |
Signed saturating Doubling Multiply returning High half (by element) | SQDMULH (vector, by element) |
SQDMULH (vector) |
Signed saturating Doubling Multiply returning High half | SQDMULH (vector) |
SQDMULL , SQDMULL2 (vector, by element) |
Signed saturating Doubling Multiply Long (by element) | SQDMULL, SQDMULL2 (vector, by element) |
SQDMULL , SQDMULL2 (vector) |
Signed saturating Doubling Multiply Long | SQDMULL, SQDMULL2 (vector) |
SQNEG (vector) |
Signed saturating Negate | SQNEG (vector) |
SQRDMLAH (vector, by element) |
Signed Saturating Rounding Doubling Multiply Accumulate returning High Half (by element) | SQRDMLAH (vector, by element) |
SQRDMLAH (vector) |
Signed Saturating Rounding Doubling Multiply Accumulate returning High Half (vector) | SQRDMLAH (vector) |
SQRDMLSH (vector, by element) |
Signed Saturating Rounding Doubling Multiply Subtract returning High Half (by element) | SQRDMLSH (vector, by element) |
SQRDMLSH (vector) |
Signed Saturating Rounding Doubling Multiply Subtract returning High Half (vector) | SQRDMLSH (vector) |
SQRDMULH (vector, by element) |
Signed saturating Rounding Doubling Multiply returning High half (by element) | SQRDMULH (vector, by element) |
SQRDMULH (vector) |
Signed saturating Rounding Doubling Multiply returning High half | SQRDMULH (vector) |
SQRSHL (vector) |
Signed saturating Rounding Shift Left (register) | SQRSHL (vector) |
SQRSHRN , SQRSHRN2 (vector) |
Signed saturating Rounded Shift Right Narrow (immediate) | SQRSHRN, SQRSHRN2 (vector) |
SQRSHRUN , SQRSHRUN2 (vector) |
Signed saturating Rounded Shift Right Unsigned Narrow (immediate) | SQRSHRUN, SQRSHRUN2 (vector) |
SQSHL (vector, immediate) |
Signed saturating Shift Left (immediate) | SQSHL (vector, immediate) |
SQSHL (vector, register) |
Signed saturating Shift Left (register) | SQSHL (vector, register) |
SQSHLU (vector) |
Signed saturating Shift Left Unsigned (immediate) | SQSHLU (vector) |
SQSHRN , SQSHRN2 (vector) |
Signed saturating Shift Right Narrow (immediate) | SQSHRN, SQSHRN2 (vector) |
SQSHRUN , SQSHRUN2 (vector) |
Signed saturating Shift Right Unsigned Narrow (immediate) | SQSHRUN, SQSHRUN2 (vector) |
SQSUB (vector) |
Signed saturating Subtract | SQSUB (vector) |
SQXTN , SQXTN2 (vector) |
Signed saturating extract Narrow | SQXTN, SQXTN2 (vector) |
SQXTUN , SQXTUN2 (vector) |
Signed saturating extract Unsigned Narrow | SQXTUN, SQXTUN2 (vector) |
SRHADD (vector) |
Signed Rounding Halving Add | SRHADD (vector) |
SRI (vector) |
Shift Right and Insert (immediate) | SRI (vector) |
SRSHL (vector) |
Signed Rounding Shift Left (register) | SRSHL (vector) |
SRSHR (vector) |
Signed Rounding Shift Right (immediate) | SRSHR (vector) |
SRSRA (vector) |
Signed Rounding Shift Right and Accumulate (immediate) | SRSRA (vector) |
SSHL (vector) |
Signed Shift Left (register) | SSHL (vector) |
SSHLL , SSHLL2 (vector) |
Signed Shift Left Long (immediate) | SSHLL, SSHLL2 (vector) |
SSHR (vector) |
Signed Shift Right (immediate) | SSHR (vector) |
SSRA (vector) |
Signed Shift Right and Accumulate (immediate) | SSRA (vector) |
SSUBL , SSUBL2 (vector) |
Signed Subtract Long | SSUBL, SSUBL2 (vector) |
SSUBW , SSUBW2 (vector) |
Signed Subtract Wide | SSUBW, SSUBW2 (vector) |
ST1 (vector, multiple structures) |
Store multiple single-element structures from one, two, three, or four registers | ST1 (vector, multiple structures) |
ST1 (vector, single structure) |
Store a single-element structure from one lane of one register | ST1 (vector, single structure) |
ST2 (vector, multiple structures) |
Store multiple 2-element structures from two registers | ST2 (vector, multiple structures) |
ST2 (vector, single structure) |
Store single 2-element structure from one lane of two registers | ST2 (vector, single structure) |
ST3 (vector, multiple structures) |
Store multiple 3-element structures from three registers | ST3 (vector, multiple structures) |
ST3 (vector, single structure) |
Store single 3-element structure from one lane of three registers | ST3 (vector, single structure) |
ST4 (vector, multiple structures) |
Store multiple 4-element structures from four registers | ST4 (vector, multiple structures) |
ST4 (vector, single structure) |
Store single 4-element structure from one lane of four registers | ST4 (vector, single structure) |
SUB (vector) |
Subtract (vector) | SUB (vector) |
SUBHN , SUBHN2 (vector) |
Subtract returning High Narrow | SUBHN, SUBHN2 (vector) |
SUQADD (vector) |
Signed saturating Accumulate of Unsigned value | SUQADD (vector) |
SXTL , SXTL2 (vector) |
Signed extend Long | SXTL, SXTL2 (vector) |
TBL (vector) |
Table vector Lookup | TBL (vector) |
TBX (vector) |
Table vector lookup extension | TBX (vector) |
TRN1 (vector) |
Transpose vectors (primary) | TRN1 (vector) |
TRN2 (vector) |
Transpose vectors (secondary) | TRN2 (vector) |
UABA (vector) |
Unsigned Absolute difference and Accumulate | UABA (vector) |
UABAL , UABAL2 (vector) |
Unsigned Absolute difference and Accumulate Long | UABAL, UABAL2 (vector) |
UABD (vector) |
Unsigned Absolute Difference (vector) | UABD (vector) |
UABDL , UABDL2 (vector) |
Unsigned Absolute Difference Long | UABDL, UABDL2 (vector) |
UADALP (vector) |
Unsigned Add and Accumulate Long Pairwise | UADALP (vector) |
UADDL , UADDL2 (vector) |
Unsigned Add Long (vector) | UADDL, UADDL2 (vector) |
UADDLP (vector) |
Unsigned Add Long Pairwise | UADDLP (vector) |
UADDLV (vector) |
Unsigned sum Long across Vector | UADDLV (vector) |
UADDW , UADDW2 (vector) |
Unsigned Add Wide | UADDW, UADDW2 (vector) |
UCVTF (vector, fixed-point) |
Unsigned fixed-point Convert to Floating-point (vector) | UCVTF (vector, fixed-point) |
UCVTF (vector, integer) |
Unsigned integer Convert to Floating-point (vector) | UCVTF (vector, integer) |
UHADD (vector) |
Unsigned Halving Add | UHADD (vector) |
UHSUB (vector) |
Unsigned Halving Subtract | UHSUB (vector) |
UMAX (vector) |
Unsigned Maximum (vector) | UMAX (vector) |
UMAXP (vector) |
Unsigned Maximum Pairwise | UMAXP (vector) |
UMAXV (vector) |
Unsigned Maximum across Vector | UMAXV (vector) |
UMIN (vector) |
Unsigned Minimum (vector) | UMIN (vector) |
UMINP (vector) |
Unsigned Minimum Pairwise | UMINP (vector) |
UMINV (vector) |
Unsigned Minimum across Vector | UMINV (vector) |
UMLAL , UMLAL2 (vector, by element) |
Unsigned Multiply-Add Long (vector, by element) | UMLAL, UMLAL2 (vector, by element) |
UMLAL , UMLAL2 (vector) |
Unsigned Multiply-Add Long (vector) | UMLAL, UMLAL2 (vector) |
UMLSL , UMLSL2 (vector, by element) |
Unsigned Multiply-Subtract Long (vector, by element) | UMLSL, UMLSL2 (vector, by element) |
UMLSL , UMLSL2 (vector) |
Unsigned Multiply-Subtract Long (vector) | UMLSL, UMLSL2 (vector) |
UMOV (vector) |
Unsigned Move vector element to general-purpose register | UMOV (vector) |
UMULL , UMULL2 (vector, by element) |
Unsigned Multiply Long (vector, by element) | UMULL, UMULL2 (vector, by element) |
UMULL , UMULL2 (vector) |
Unsigned Multiply long (vector) | UMULL, UMULL2 (vector) |
UQADD (vector) |
Unsigned saturating Add | UQADD (vector) |
UQRSHL (vector) |
Unsigned saturating Rounding Shift Left (register) | UQRSHL (vector) |
UQRSHRN , UQRSHRN2 (vector) |
Unsigned saturating Rounded Shift Right Narrow (immediate) | UQRSHRN, UQRSHRN2 (vector) |
UQSHL (vector, immediate) |
Unsigned saturating Shift Left (immediate) | UQSHL (vector, immediate) |
UQSHL (vector, register) |
Unsigned saturating Shift Left (register) | UQSHL (vector, register) |
UQSHRN , UQSHRN2 (vector) |
Unsigned saturating Shift Right Narrow (immediate) | UQSHRN, UQSHRN2 (vector) |
UQSUB (vector) |
Unsigned saturating Subtract | UQSUB (vector) |
UQXTN , UQXTN2 (vector) |
Unsigned saturating extract Narrow | UQXTN, UQXTN2 (vector) |
URECPE (vector) |
Unsigned Reciprocal Estimate | URECPE (vector) |
URHADD (vector) |
Unsigned Rounding Halving Add | URHADD (vector) |
URSHL (vector) |
Unsigned Rounding Shift Left (register) | URSHL (vector) |
URSHR (vector) |
Unsigned Rounding Shift Right (immediate) | URSHR (vector) |
URSQRTE (vector) |
Unsigned Reciprocal Square Root Estimate | URSQRTE (vector) |
URSRA (vector) |
Unsigned Rounding Shift Right and Accumulate (immediate) | URSRA (vector) |
USHL (vector) |
Unsigned Shift Left (register) | USHL (vector) |
USHLL , USHLL2 (vector) |
Unsigned Shift Left Long (immediate) | USHLL, USHLL2 (vector) |
USHR (vector) |
Unsigned Shift Right (immediate) | USHR (vector) |
USQADD (vector) |
Unsigned saturating Accumulate of Signed value | USQADD (vector) |
USRA (vector) |
Unsigned Shift Right and Accumulate (immediate) | USRA (vector) |
USUBL , USUBL2 (vector) |
Unsigned Subtract Long | USUBL, USUBL2 (vector) |
USUBW , USUBW2 (vector) |
Unsigned Subtract Wide | USUBW, USUBW2 (vector) |
UXTL , UXTL2 (vector) |
Unsigned extend Long | UXTL, UXTL2 (vector) |
UZP1 (vector) |
Unzip vectors (primary) | UZP1 (vector) |
UZP2 (vector) |
Unzip vectors (secondary) | UZP2 (vector) |
XTN , XTN2 (vector) |
Extract Narrow | XTN, XTN2 (vector) |
ZIP1 (vector) |
Zip vectors (primary) | ZIP1 (vector) |
ZIP2 (vector) |
Zip vectors (secondary) | ZIP2 (vector) |