Extract vector from pair of vectors.
- Is the name of the SIMD and FP destination register.
Is an arrangement specifier, and can be either
- Is the name of the first SIMD and FP source register.
- Is the name of the second SIMD and FP source register.
- Is the lowest numbered byte element to be extracted in the range shown in Usage.
Extract vector from pair of vectors. This instruction extracts the lowest vector elements from the second source SIMD and FP register and the highest vector elements from the first source SIMD and FP register, concatenates the results into a vector, and writes the vector to the destination SIMD and FP register vector. The index value specifies the lowest vector element to extract from the first source register, and consecutive elements are extracted from the first, then second, source registers until the destination vector is filled.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
The following table shows the valid specifier combinations:
Table 20-6 EXT (Vector) specifier combinations
|8B||0 to 7|
|16B||0 to 15|