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FRECPE (vector)

Floating-point Reciprocal Estimate.

Syntax

FRECPE Vd.T, Vn.T ; Vector half precision

FRECPE Vd.T, Vn.T ; Vector single-precision and double-precision

Where:

Vd
Is the name of the SIMD and FP destination register
T

For the vector half precision variant: is an arrangement specifier:

Vector half precision
Can be one of 4H or 8H.
Vector single-precision and double-precision
Can be one of 2S, 4S or 2D.
Vn
Is the name of the SIMD and FP source register

Architectures supported (vector)

Supported in ARMv8.2 and later.

Usage

Floating-point Reciprocal Estimate. This instruction finds an approximate reciprocal estimate for each vector element in the source SIMD and FP register, places the result in a vector, and writes the vector to the destination SIMD and FP register.

This instruction can generate a floating-point exception. Depending on the settings in FPCR in the ARMv8-A Architecture Reference Manual, the exception results in either a flag being set in FPSR in the ARMv8-A Architecture Reference Manual or a synchronous exception being generated. For more information, see Floating-point exception traps in the ARMv8-A Architecture Reference Manual.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

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