Signed Minimum Pairwise.
- Is the name of the SIMD and FP destination register.
Is an arrangement specifier, and can be one of
- Is the name of the first SIMD and FP source register.
- Is the name of the second SIMD and FP source register.
Signed Minimum Pairwise. This instruction creates a vector by concatenating the vector elements of the first source SIMD and FP register after the vector elements of the second source SIMD and FP register, reads each pair of adjacent vector elements in the two source SIMD and FP registers, writes the smallest of each pair of signed integer values into a vector, and writes the vector to the destination SIMD and FP register.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.