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VCMLA

Vector Complex Multiply Accumulate.

Syntax

VCMLA{q}.dt {Dd,} Dn, Dm, #rotate ; A1 64-bit SIMD vector FP/SIMD registers (A32)

VCMLA{q}.dt {Qd,} Qn, Qm, #rotate ; A1 128-bit SIMD vector FP/SIMD registers (A32)

VCMLA{q}.dt {Dd,} Dn, Dm, #rotate ; T1 64-bit SIMD vector FP/SIMD registers (T32)

VCMLA{q}.dt {Qd,} Qn, Qm, #rotate ; T1 128-bit SIMD vector FP/SIMD registers (T32)

Where:

q
See Standard assembler syntax fields in the ARMv8-A Architecture Reference Manual.
dt

Is the data type for the elements of the vectors:

64
Can be one of F16 or F32.
64-bit SIMD vector FP/SIMD registers
Can be one of F16 or F32.
Dd
Is the 64-bit name of the SIMD and FP destination register.
Dn
Is the 64-bit name of the first SIMD and FP source register.
Dm
Is the 64-bit name of the second SIMD and FP source register.
rotate

Is the rotation to be applied to elements in the second SIMD and FP source register:

64
Can be one of 0, 90, 180 or 270.
64-bit SIMD vector FP/SIMD registers
Can be one of 0, 90, 180 or 270.
Qd
Is the 128-bit name of the SIMD and FP destination register.
Qn
Is the 128-bit name of the first SIMD and FP source register.
Qm
Is the 128-bit name of the second SIMD and FP source register.

Architectures supported

Supported in ARMv8.3.

Usage

Vector Complex Multiply Accumulate.

Depending on settings in the CPACR in the ARMv8-A Architecture Reference Manual, NSACR in the ARMv8-A Architecture Reference Manual, and HCPTR in the ARMv8-A Architecture Reference Manual registers, and the security state and mode in which the instruction is executed, an attempt to execute the instruction might be undefined, or trapped to Hyp mode. For more information see Enabling Advanced SIMD and floating-point support in the ARMv8-A Architecture Reference Manual.

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