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Differences between A32/T32 and A64 Advanced SIMD instruction syntax

The syntax and mnemonics of A64 Advanced SIMD instructions are based on those in A32/T32 but with some differences.

The following table describes the main differences.

Table 9-1 Differences in syntax and mnemonics between A32/T32 and A64 Advanced SIMD instructions

A32/T32 A64

All Advanced SIMD instruction mnemonics begin with V, for example VMAX.

The first letter of the instruction mnemonic indicates the data type of the instruction. For example, SMAX, UMAX, and FMAX mean signed, unsigned, and floating-point respectively. No suffix means the type is irrelevant and P means polynomial.

A mnemonic qualifier specifies the type and width of elements in a vector. For example, in the following instruction, U32 means 32-bit unsigned integers:

VMAX.U32 Q0, Q1, Q2

A register qualifier specifies the data width and the number of elements in the register. For example, in the following instruction .4S means 4 32-bit elements:

UMAX V0.4S, V1.4S, V2.4S

The 128-bit vector registers are named Q0-Q15 and the 64-bit vector registers are named D0-D31.

All vector registers are named Vn , where n is a register number between 0 and 31. You only use one of the qualified register names Qn, Dn, Sn, Hn or Bn when referring to a scalar register, to indicate the number of significant bits.

You load a single element into one or more vector registers by appending an index to each register individually, for example:

VLD4.8 {D0[3], D1[3], D2[3], D3[3]}, [R0]

You load a single element into one or more vector registers by appending the index to the register list, for example:

LD4 {V0.B, V1.B, V2.B, V3.B}[3], [X0]

You can append a condition code to most Advanced SIMD instruction mnemonics to make them conditional.

A64 has no conditionally executed floating-point or Advanced SIMD instructions.

L, W and N suffixes indicate long, wide and narrow variants of Advanced SIMD data processing instructions. A32/T32 Advanced SIMD does not include vector narrowing or widening second part instructions.

L, W and N suffixes indicate long, wide and narrow variants of Advanced SIMD data processing instructions. You can additionally append a 2 to implement the second part of a narrowing or widening operation, for example:

UADDL2 V0.4S, V1.8H, V2.8H ; take input from 4 high-numbered lanes of V1 and V2
A32/T32 Advanced SIMD does not include vector reduction instructions.

The V Advanced SIMD mnemonic suffix identifies vector reduction instructions, in which the operand is a vector and the result a scalar, for example:

ADDV S0, V1.4S

The P mnemonic qualifier which indicates pairwise instructions is a prefix, for example, VPADD.

The P mnemonic qualifier is a suffix, for example ADDP.

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