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Process State

In AArch64 state, there is no Current Program Status Register (CPSR). You can access the different components of the traditional CPSR independently as Process State fields.

The Process State fields are:

  • N, Z, C, and V condition flags (NZCV).
  • Current register width (nRW).
  • Stack pointer selection bit (SPSel).
  • Interrupt disable flags (DAIF).
  • Current exception level (EL).
  • Single step process state bit (SS).
  • Illegal exception return state bit (IL).

You can use MSR to write to:

  • The N, Z, C, and V flags in the NZCV register.
  • The interrupt disable flags in the DAIF register.
  • The SP selection bit in the SPSel register, in EL1 or higher.

You can use MRS to read:

  • The N, Z, C, and V flags in the NZCV register.
  • The interrupt disable flags in the DAIF register.
  • The exception level bits in the CurrentEL register, in EL1 or higher.
  • The SP selection bit in the SPSel register, in EL1 or higher.

When an exception occurs, all Process State fields associated with the current exception level are stored in a single register associated with the target exception level, the SPSR. You can access the SS, IL, and nRW bits only from the SPSR.

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