VCEQ (register)
Vector Compare Equal.
Syntax
VCEQ
{
}.cond
{datatype
}, Qd
,
Qn
Qm
VCEQ
{
}.cond
{datatype
}, Dd
,
Dn
Dm
where:
cond
is an optional condition code.
datatype
must be one of
I8
,I16
,I32
, orF32
.The result datatype is:
I32
for operand datatypesI32
orF32
.I16
for operand datatypeI16
.I8
for operand datatypeI8
.
Qd, Qn, Qm
specifies the destination register, the first operand register, and the second operand register, for a quadword operation.
Dd, Dn, Dm
specifies the destination register, the first operand register, and the second operand register, for a doubleword operation.
Operation
VCEQ
takes the value of each element in a vector, and compares it with the
value of the corresponding element of a second vector. If the condition is true, the
corresponding element in the destination vector is set to all ones. Otherwise, it is set to
all zeros.