Sign extend Halfword with Add, to extend a 16-bit value to a 32-bit value.
is an optional condition code.
is the destination register.
is the register holding the number to add.
is the register holding the value to extend.
is one of:
is rotated right 8 bits.
is rotated right 16 bits.
is rotated right 24 bits.
is omitted, no rotation is performed.
This instruction does the following:
Rotate the value from
right by 0, 8, 16 or 24 bits.
Extract bits[15:0] from the value obtained.
Sign extend to 32 bits.
Add the value from
You cannot use PC for any operand.
You can use SP in A32 instructions but this is deprecated. You cannot use SP in T32 instructions.
This instruction does not change the flags.
The 32-bit instruction is available in A32 and T32.
For the Armv7‑M architecture, the 32-bit T32 instruction is only available in an Armv7E-M implementation.
There is no 16-bit version of this instruction in T32.