You copied the Doc URL to your clipboard.

FRINTP (vector)

Floating-point Round to Integral, toward Plus infinity (vector).

Syntax

FRINTP Vd.T, Vn.T ; Half-precision

FRINTP Vd.T, Vn.T ; Single-precision and double-precision

Where:

T

Is an arrangement specifier:

Half-precision
Can be one of 4H or 8H.
Single-precision and double-precision
Can be one of 2S, 4S or 2D.
Vd
Is the name of the SIMD and FP destination register.
Vn
Is the name of the SIMD and FP source register.

Architectures supported (vector)

Supported in the Arm®v8.2 architecture and later.

Usage

Floating-point Round to Integral, toward Plus infinity (vector). This instruction rounds a vector of floating-point values in the SIMD and FP source register to integral floating-point values of the same size using the Round towards Plus Infinity rounding mode, and writes the result to the SIMD and FP destination register.

A zero input gives a zero result with the same sign, an infinite input gives an infinite result with the same sign, and a NaN is propagated as for normal arithmetic.

This instruction can generate a floating-point exception. Depending on the settings in FPCR, the exception results in either a flag being set in FPSR, or a synchronous exception being generated. For more information, see Floating-point exception traps in the Arm® Architecture Reference Manual Arm®v8, for Arm®v8‑A architecture profile.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

Was this page helpful? Yes No