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Type 1 image, one load region and contiguous execution regions

A Type 1 image consists of a single load region in the load view and three execution regions in the execution view. The execution regions are placed contiguously in the memory map.

Note

Although --ropi is fully supported in armlink, it is a [BETA] feature in the context of the ARM® Compiler 6 RWPI feature.

--ro_base address specifies the load and execution address of the region containing the RO output section. The following example shows the scatter-loading description equivalent to using --ro_base 0x040000:

LR_1 0x040000     ; Define the load region name as LR_1, the region starts at 0x040000.
{
    ER_RO +0      ; First execution region is called ER_RO, region starts at end of
                  ; previous region. Because there is no previous region, the
                  ; address is 0x040000.
    {
        * (+RO)   ; All RO sections go into this region, they are placed
                  ; consecutively.
    }
    ER_RW +0      ; Second execution region is called ER_RW, the region starts at the
                  ; end of the previous region.
                  ; The address is 0x040000 + size of ER_RO region.
    {
        * (+RW)   ; All RW sections go into this region, they are placed
                  ; consecutively.
    }
    ER_ZI +0      ; Last execution region is called ER_ZI, the region starts at the 
                  ; end of the previous region at 0x040000 + the size of the ER_RO
                  ; regions + the size of the ER_RW regions.
    {
        * (+ZI)   ; All ZI sections are placed consecutively here.
    }
}

In this example:

  • This description creates an image with one load region called LR_1 that has a load address of 0x040000.
  • The image has three execution regions, named ER_RO, ER_RW, and ER_ZI, that contain the RO, RW, and ZI output sections respectively. RO, RW are root regions. ZI is created dynamically at runtime. The execution address of ER_RO is 0x040000. All three execution regions are placed contiguously in the memory map by using the +offset form of the base designator for the execution region description. This enables an execution region to be placed immediately following the end of the preceding execution region.

Use the --reloc option to make relocatable images. Used on its own, --reloc makes an image similar to simple type 1, but the single load region has the RELOC attribute.

Note

The --reloc option and RELOC attribute are not supported for AArch64 state.

ROPI example variant (AArch32 only) [BETA]

In this variant, the execution regions are placed contiguously in the memory map. However, --ropi marks the load and execution regions containing the RO output section as position-independent.

The following example shows the scatter-loading description equivalent to using --ro_base 0x010000 --ropi:

LR_1 0x010000 PI        ; The first load region is at 0x010000. 
{
    ER_RO +0            ; The PI attribute is inherited from parent.
                        ; The default execution address is 0x010000, but the code
                        ; can be moved.
    {
        * (+RO)         ; All the RO sections go here.
    }
    ER_RW +0 ABSOLUTE   ; PI attribute is overridden by ABSOLUTE.
    {
        * (+RW)         ; The RW sections are placed next. They cannot be moved.
    }
    ER_ZI +0            ; ER_ZI region placed after ER_RW region.
    {
        * (+ZI)         ; All the ZI sections are placed consecutively here.
    }
}

ER_RO, the RO execution region, inherits the PI attribute from the load region LR_1. The next execution region, ER_RW, is marked as ABSOLUTE and uses the +offset form of base designator. This prevents ER_RW from inheriting the PI attribute from ER_RO. Also, because the ER_ZI region has an offset of +0, it inherits the ABSOLUTE attribute from the ER_RW region.

Note

Be aware that if an image contains execute-only sections, ROPI is not supported. armlink gives an error if you use --ropi to link such an image.

Note

XO memory is supported only for ARMv7-M and ARMv8-M architectures.