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Type 2 image, one load region and non-contiguous execution regions

A Type 2 image consists of a single load region in the load view and three execution regions in the execution view. It is similar to images of Type 1 except that the RW execution region is not contiguous with the RO execution region.

--ro_base=address specifies the load and execution address of the region containing the RO output section. --rw_base=address specifies the execution address for the RW execution region.

For images that contain execute-only (XO) sections, the XO execution region is placed at the address specified by --ro_base. The RO execution region is placed contiguously and immediately after the XO execution region.

If you use --xo_base address, then the XO execution region is placed in a separate load region at the specified address.

Note

XO memory is supported only for Armv7‑M and Armv8‑M architectures.

Example for single load region and multiple execution regions

The following example shows the scatter-loading description equivalent to using --ro_base=0x010000 --rw_base=0x040000:

LR_1 0x010000        ; Defines the load region name as LR_1
{
    ER_RO +0         ; The first execution region is called ER_RO and starts at end
                     ; of previous region. Because there is no previous region, the
                     ; address is 0x010000.
    {
        * (+RO)      ; All RO sections are placed consecutively into this region.
    }
    ER_RW 0x040000   ; Second execution region is called ER_RW and starts at 0x040000.
    {
        * (+RW)      ; All RW sections are placed consecutively into this region.
    }
    ER_ZI +0         ; The last execution region is called ER_ZI.
                     ; The address is 0x040000 + size of ER_RW region.
    {
        * (+ZI)      ; All ZI sections are placed consecutively here.
    }
}

In this example:

  • This description creates an image with one load region, named LR_1, with a load address of 0x010000.
  • The image has three execution regions, named ER_RO, ER_RW, and ER_ZI, that contain the RO, RW, and ZI output sections respectively. The RO region is a root region. The execution address of ER_RO is 0x010000.
  • The ER_RW execution region is not contiguous with ER_RO. Its execution address is 0x040000.
  • The ER_ZI execution region is placed immediately following the end of the preceding execution region, ER_RW.

RWPI example variant (AArch32 only)

This is similar to images of Type 2 with --rw_base where the RW execution region is separate from the RO execution region. However, --rwpi marks the execution regions containing the RW output section as position-independent.

The following example shows the scatter-loading description equivalent to using --ro_base=0x010000 --rw_base=0x018000 --rwpi:

LR_1 0x010000           ; The first load region is at 0x010000.
{
    ER_RO +0            ; Default ABSOLUTE attribute is inherited from parent.
                        ; The execution address is 0x010000. The code and RO data
                        ; cannot be moved.
    {
        * (+RO)         ; All the RO sections go here.
    }
    ER_RW 0x018000 PI   ; PI attribute overrides ABSOLUTE
    {
        * (+RW)         ; The RW sections are placed at 0x018000 and they can be
                        ; moved.
    }
    ER_ZI +0            ; ER_ZI region placed after ER_RW region.
    {
        * (+ZI)         ; All the ZI sections are placed consecutively here.
    }
}

ER_RO, the RO execution region, inherits the ABSOLUTE attribute from the load region LR_1. The next execution region, ER_RW, is marked as PI. Also, because the ER_ZI region has an offset of +0, it inherits the PI attribute from the ER_RW region.

Similar scatter-loading descriptions can also be written to correspond to the usage of other combinations of --ropi and --rwpi with Type 2 and Type 3 images.

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