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PL022_SSP - registers

This section describes the registers.


Table 1. PL022_SSP registers
Name Offset Access Description
SSPCR0 000 Read/write Control register 0
SSPCR1 004 Read/write Control register 1
SSPDR 008 Read/write FIFO data
SSPSR 00C Read only Status
SSPCPSR 010 Read/write Clock prescale
SSPIMSC 014 Read/write Interrupt mask set/clear
SSPRIS 018 Read only Raw interrupt status
SSPMIS 01C Read only Masked interrupt status
SSPICR 020 Write only Interrupt clear
SSPDMACR 024 Read/write DMA control
SSPeriphID0 FE0 Read only Peripheral ID bits[7:0]
SSPeriphID1 FE4 Read only Peripheral ID bits[15:8]
SSPeriphID2 FE8 Read only Peripheral ID bits[23:16]
SSPeriphID3 FEC Read only Peripheral ID bits[31:24]
SSPPCellID0 FF0 Read only PrimeCell ID bits[7:0]
SSPPCellID01 FF4 Read only PrimeCell ID bits[15:8]
SSPPCellID FF8 Read only PrimeCell ID bits[23:16]
SSPPCellID3 FFC Read only PrimeCell ID bits[31:24]

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